FPGA Design Engineer

Overview

On Site
USD 131,726.00 - 140,000.00 per year
Full Time

Skills

Electrical Engineering
Computer Engineering
Science
Mathematics
DoD
Cross-functional Team
Product Design
Systems Architecture
VHDL
Embedded Systems
IP
Intellectual Property
Testing
FPGA
Multitasking
Security Clearance
Training And Development
Research
Apache Flex
Health Care
Mergers and Acquisitions
Dynamics
Innovation
Honesty

Job Details

Basic Qualifications

Bachelor's degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field, plus a minimum of 5 years of relevant experience; or Master's degree plus a minimum of 3 years of relevant experience.

CLEARANCE REQUIREMENTS: Department of Defense Secret security clearance is required at time of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required.

Responsibilities for this Position

ROLE AND POSITION OBJECTIVES:

Sign on Bonus up to $5000

As a Cyber FPGA design engineer, you'll be a member of a cross functional team responsible for product design from system architecture & requirements allocation through product release and production of cost-sensitive secure products.

We encourage you to apply if you have any of these preferred skills or experiences: Experience with Zync UltraScale+ MPSoC or similar FPGAs, Vivado or similar tools; VHDL or similar languages.

What sets you apart:
  • Experience implementing cutting edge FPGA designs and achieving design closure to meet area, power, and timing constraints
  • Integrating and closing timing on designs that include but are not limited to custom developed solutions with embedded hard & soft processors and with commercial & custom IP.
  • Ability to work with cross functional teams as needed to define and refine FPGA design requirements.
  • Support development teams with HW/SW integration and testing the FPGA design.
  • Ability to multi-task and handle numerous jobs simultaneously.
  • Designing, building, and producing low to high volume products
  • Active Secret clearance is required

Our Commitment to You:
  • An exciting career path with opportunities for continuous learning and development.
  • Research oriented work, alongside award winning teams developing practical solutions for our nation's security
  • Flexible schedules with every other Friday off work, if desired (9/80 schedule)
  • Competitive benefits, including 401k matching, flex time off, paid parental leave, healthcare benefits, health & wellness programs, employee resource and social groups, and more
  • See more at gdmissionsystems.com/careers/why-work-for-benefits

Workplace Options:

This position is fully on-site, you will be a part of the Dedham, MA or Scottsdale, AZ facility. Relocation is available.

#CJ3

Salary Note

This estimate represents the typical salary range for this position based on experience and other factors (geographic location, etc.). Actual pay may vary. This job posting will remain open until the position is filled.

Combined Salary Range

USD $131,726.00 - USD $140,000.00 /Yr.

Company Overview

General Dynamics Mission Systems (GDMS) engineers a diverse portfolio of high technology solutions, products and services that enable customers to successfully execute missions across all domains of operation. With a global team of 12,000+ top professionals, we partner with the best in industry to expand the bounds of innovation in the defense and scientific arenas. Given the nature of our work and who we are, we value trust, honesty, alignment and transparency. We offer highly competitive benefits and pride ourselves in being a great place to work with a shared sense of purpose. You will also enjoy a flexible work environment where contributions are recognized and rewarded. If who we are and what we do resonates with you, we invite you to join our high-performance team!

Equal Opportunity Employer / Individuals with Disabilities / Protected Veterans
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