Verification Engineer

Overview

$$ 60-70/ Hourly/ W-2
Contract - W2
Contract - 12+ month(s)

Skills

Mergers and Acquisitions
IP
Intellectual Property
CPU
GPU
Integrated Circuit
Test Plans
Management
System On A Chip
Computer Hardware
Modeling
ASIC
Firmware
Hardware Development
UVM
SystemVerilog
SystemC
Verilog
DPI
PL/I
Analytical Skill
Attention To Detail
Communication

Job Details

Role: Verification Engineer

Location: Boxborough MA 01719 | Hybrid

Duration: 12+ months

Note: Prefer experience with PSS language and UVM

Job Description:

Participate in the functional verification of a block(s) of complex ASICs and/or IP cores for a combined CPU/GPU development effort. Be part of a team of design and verification engineers, working closely with other team members to understand and verify the functionality of a given design element within the context of the block, chip and overall system. Be responsible for carefully documenting and executing test plan(s) consisting of directed and constrained-random tests to be run during simulation. Be expected to adopt the evolving verification methodologies used in the industry to functionally verify increasingly more complex SoC designs within aggressive, market-driven schedules, and work within the existing verification infrastructure on currently active projects. Be familiar with hardware modeling and/or assertion-based verification methods.

Experience and Education:

  • 5 or more years of proven verification experience on large ASIC development projects or software/firmware experience in a hardware development setting;
  • Strong background in PSS/UVM/SystemVerilog
  • Experience in Verilog/SystemVerilog/SystemC, preferred
  • Experience in C/Verilog environment using DPI/PLI, preferred
  • Strong analytical skills and attention to detail
  • Excellent written and communication skills

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