Sr. ASIC Engineer

Work Shift: 1st Shift (9/80A)

Looking for an ASIC engineer to validate the performance of a high speed ASIC at our Aviation Blvd facility in Baltimore, MD. The ASIC is tested using a Stratix 10 FPGA and requires that the qualified candidate have experience of writing Matlab code and VHDL to generate commands to control and capture results. Familiarity with operation of High Speed Interfaces like a SerDes is required.

Responsibilities:

• Conduct testing of ASIC in the lab utilizing the FPGA which is part of the test set up. Use signal generators, oscilloscopes and network analyzer for testing Identify, troubleshoot when results don t agree with documentation and generate reports for the program leads Communicate project status to the Integration and Test (I&T) lead.
• Create new or update Matlab scripts that provide control and command for the test fixture.
• Update FPGA firmware using VHDL as needed

Creating Matlab scripts for command and control of the FPGA that in turns communicates with the ASIC. Engineer needs to have good working knowledge of VHDL in case firmware for the FPGA needs updating.

Basic Qualifications for Lab Validation Engineer - Integration and Test:

• Bachelor's degree in a Electrical or Computer Engineering with 8+ years experience Detailed knowledge and past experience of writing MATLAB scripts for device testing Demonstrated problem solving and troubleshooting skills.
• Familiarity of testing high speed interfaces such as SerDes.
• Working knowledge of standard test equipment: network analyzers, oscilloscopes, waveform generators, synthesizers, digitizers, and/or signal analyzers.

Preferred Qualifications:

• Knowledge of High Speed ADC for Direct RF sampled systems.