Power Estimation & Low Power Verification Engineer

Job Title: Power Estimation & Low Power Verification Engineer

Location: San Jose, CA

Job Description:

We're seeking an experienced Power Estimation & Low Power Verification Engineer to work with our team in San Jose, CA. As a key member of our team, you'll be responsible for:

- Collaborating with architects and logic designers to define power specifications and UPF
- Supporting UPF for design, DV, and implementation teams
- Verifying and signing off low power intent using VCLP tool
- Defining low power vectors and generating early and signoff power data using PTPX or other low power tools
- Analyzing power data and working with PD and design teams to optimize for low power and improve PPA
- Enhancing low power flows and working with tool vendors to address power-related issues

Requirements:

- Experience in power estimation and low power verification
- Hands-on skills in scripting languages (Shell, TCL, Perl, Python)
- Experience with UPF, VCLP, and PTPX or other low power tools
- Strong understanding of power analysis and optimization techniques
- Excellent collaboration and communication skills

Nice to Have:

- Experience correlating pre-silicon power estimates with post-silicon measurements

What We Offer:

- Competitive salary and benefits package
- Opportunities for professional growth and development
- Collaborative and dynamic work environment

If you're passionate about power estimation and low power verification, let's connect! #PowerEstimation #LowPowerVerification #JobOpening #SanJose #Engineering