Overview
On Site
Depends on Experience
Accepts corp to corp applications
Contract - W2
Skills
ASIC
Artificial Intelligence
Computer Hardware
LPU Integration
Language Processor Unit
AI/ML
LPU
Board-Level Design
PCB
SI/PI analysis
Signal Integrity
Power Integrity
Debugging
Debug chip
board
bring-up
bring up
Serdes
PCIe
DDR
POLs
VRMs
Job Details
Role: Hardware Systems Design Engineer
Location: San Jose, CA (Onsite 3-4 days per week)
Location: San Jose, CA (Onsite 3-4 days per week)
<>Key Responsibilities & LPU Focus:</>
LPU Integration: You would be responsible for designing products based on the GroqChip LPU (Language Processor Unit) AI/ML processors.
Board-Level Design: Lead PCB layout and SI/PI analysis (Signal Integrity/Power Integrity).
Debugging: Debug chip, board, and system-level hardware and software issues.
System Bring-up: Design boards intended for ASIC bring-up and post-silicon validation testing.
<>Core Requirements:</>
8+ years of proven experience.
Proficiency with high-speed interfaces (Serdes, PCIe, DDR).
Experience designing power sub-sections (POLs, VRMs, etc.).
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