Signal & Power Integrity Engineer

Overview

On Site
Accepts corp to corp applications
Contract - W2
Contract - Independent
Contract - 6 month(s)

Skills

Network
Modeling
Interfaces
System Requirements
Extraction
HSPICE
DDR SDRAM
PCI Express
Analytical Skill
Communication
Oracle UCM
LinkedIn

Job Details

Title: Signal & Power Integrity Engineer

Location: Chandler, Arizona OR San Jose, CA | Onsite

Duration: 12+ Months

Role:

  • Experienced (>5y) Signal & Power Integrity Engineer to support high-speed interfaces (LPDDR5X, PCIe Gen7, UCIe 64G), with responsibilities extending into power delivery network (PDN) analysis.

Responsibilities:

  • All SI tasks described above (channel modeling, extractions, eye analysis).
  • Perform power integrity extractions and simulations for high-speed interfaces.
  • Model and analyze package/board PDN
  • Define decoupling strategy and validate against system requirements.
  • Provide design guidelines balancing both SI and PI constraints.

Qualifications:

  • Strong background in both signal and power integrity.
  • Hands-on experience with SI tools (listed above).
  • Proficiency with PI extraction/simulation tools (e.g., PowerSI, SIwave, AEDT, HSPICE, equivalent).
  • Knowledge of DDR, PCIe, UCIe standards and PDN design best practices.
  • Strong analytical and communication skills.

Best regards,

Lavesh Kumar

| Sr. Technical Recruiter

STELLENT IT A Nationally Recognized Minority
Certified Enterprise

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