FPGA RTL Design Engineer Networking Domain L2/L3

ob Title: FPGA RTL Design Engineer Networking Domain L2/L3

Location: San Jose, California, USA (Remote)

Experience: 10 to 15 years 1 Engineer and 8 to 10 years - 2 Engineers

Total number of positions: 3

About the Role:

RTL Design Engineers with deep expertise in high-speed Ethernet networking domain, with exposure in Layer2/Layer3(L2/L3) packet processing. You will work closely with the customer to develop cutting-edge network security solutions on FPGA based platforms.

Key Responsibilities:

• Work with customer to understand the requirements and architect efficient RTL implementations targeting FPGAs
• Design L2/L3 security protocols as per standard specifications (802.1AE or similar) targeting 100Gbps/400Gbps wireline Ethernet
• Develop RTL architecture and microarchitecture based on specifications
• Implement RTL (Verilog/VHDL/SystemVerilog) for blocks like packet classification, MACSec, IPSec using Encryption/Decryption/High speed networking IP integration
• Perform functional verification, linting, and synthesis of RTL designs
• Implement on FPGA systems and validate the performance
• Collaborate with verification, and firmware teams to ensure end-to-end integration and functionality
• Support bring-up and on-board validation as required

Required Skills & Experience:

• Strong RTL architecting and design skills in Verilog/SystemVerilog with expert knowledge of networking and wireline Ethernet packet processing
• Proficient in OSI model and L2/L3 protocols for RTL implementation on FPGA
• Solid understanding of networking domain control and data planes
• Familiarity with verification methodologies desirable (UVM/SystemVerilog preferred)
• Expertise in FPGA design flow including synthesis, implementation, STA and timing closure
• Exposure in AMD and Altera tool flows Versal device exposure is highly desired
• Good debugging skills and ability to analyze RTL and simulation mismatches

Preferred Qualifications:

• Masters/Bachelors (MS/BS/ME/BE/M.Tech/B.Tech) in Electronics, Electrical, or a related field
• Experience with FPGA tools (e.g., AMD/Xilinx, Altera)
• Knowledge of scripting languages like Python, Tcl, or Perl
• Hands on experience on tools such as ModelSim, Questasim, Vivado, Quartus