Overview
Skills
Job Details
Work closely with RF designers and layout engineers to develop high-quality, transistor-level layouts for advanced RF and analog circuits such as PLLs, LNAs, Mixers, PAs, ADC/DAC, and bias blocks. Ensure all layouts meet stringent verification, reliability, and manufacturing standards (DRC, LVS, DFM, Extraction).
Mandatory Skills:
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Proven experience with FinFET technology and deep sub-micron CMOS processes
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Expertise in custom RF/analog layout for transceivers or analog circuits
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High proficiency in CALIBRE DRC/LVS/ERC verification tools
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Strong working knowledge of Cadence layout tools
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Solid understanding of power routing, matching, and signal integrity
Optional Skills:
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Advanced layout techniques for device matching, RF shielding, and parasitic minimization
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Understanding of RC delay, electromigration, and coupling effects
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Familiarity with guard rings, DNW, PN junctions, and layout-dependent effects (LOD/WPE)
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Strong collaboration and communication skills with design teams