Overview
Remote
Depends on Experience
Contract - Independent
Skills
ARM
ASIC
Analytical Skill
Clarity
Collaboration
Communication
Computer Architecture
Computer Engineering
Computer Hardware
Critical Thinking
Debugging
FOCUS
Hardware Development
Logic Synthesis
Optimization
Physical Data Model
RTL
Research
Specification Gathering
System On A Chip
Training
VLSI
Workflow
Job Details
Role: Hardware & VLSI Design Intern
Contract: 3 Months
Location: Remote (4 hours overlap required in PST)
Preference: Master s & PhD Students
Day-to-Day:
- Build datasets for real-world ASIC/SoC workflows (RTL, verification, physical design).
- Simulate conversations/prompts on design constraints, tool use & debugging.
- Write/review explanations on ARM-based SoC design, tape-out & optimization.
- Evaluate model outputs, detect flaws/hallucinations & give corrective feedback.
- Translate complex hardware specs into training data & instructional content.
- Refactor code+instruction samples for clarity & accuracy.
- Cover full lifecycle (design specs GDSII signoff) with focus on <45nm (TSMC, UMC, GlobalFoundries).
- Collaborate with prompt engineers/reviewers for model alignment in the ASIC domain.
Requirements:
- Currently enrolled in a Master s/PhD in ECE, Computer Engineering, or related field.
- Strong background in Hardware Design, VLSI, and Digital Systems.
- Understanding of computer architecture, logic design & hardware verification.
- Strong analytical & critical thinking skills.
- Excellent written communication.
- Able to work independently & in collaborative research setups.
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