Principal Digital ASIC Designer Engineer

Overview

On Site
USD 175,000.00 - 200,000.00 per year
Contract - Independent

Skills

Mergers and Acquisitions
Scalability
RTL
Computer Hardware
Integrated Circuit
Business Development
Proposal Writing
Mentorship
Layout
Extraction
Collaboration
Electrical Engineering
Computer Engineering
ASIC
Digital Circuit Design
Cadence
Synopsys
SystemVerilog
Verilog
VHDL
Semiconductors
Physics
Computer Architecture
Communication
Documentation
Team Leadership
CMOS
Electronics
Leadership
Privacy
Marketing

Job Details

Location: Cambridge, MA
Salary: $175,000.00 USD Annually - $200,000.00 USD Annually
Description:
We're looking for a Senior Digital ASIC Designer to join our multidisciplinary engineering teams and develop high-performance digital ASICs using advanced technologies. In this role, you'll own the design process from RTL development through synthesis, contribute to architectural innovations, and optimize digital systems for performance, power, and scalability.

You'll collaborate with cross-functional teams to deliver secure, high-impact solutions across a range of applications-and be part of a mission-driven organization where your contributions directly support national priorities.

This job will have the following responsibilities:
  • Develop and simulate transistor-level circuits based on architecture and specifications
  • Architect and implement ASIC designs (RTL to synthesis) across advanced nodes
  • Optimize hardware for power, performance, and cost
  • Evaluate algorithmic and system-level requirements for hardware feasibility
  • Drive complex chip architecture and contribute to design strategy
  • Lead technical decisions amid changing or incomplete customer requirements
  • Support business development and proposal writing activities
  • Mentor and support junior engineers in best practices
  • Guide layout processes including floor-planning and parasitic extraction simulations
  • Collaborate on design-for-test strategies and physical verification



Qualifications & Requirements:
  • Bachelor's degree in Electrical Engineering, Computer Engineering, or related field
  • 7-10 years of ASIC design experience with a bachelor's degree OR 5-10 years with a master's degree
  • Expertise in digital IC design methodologies and tools (Cadence, Synopsys)
  • Proficiency in System Verilog, Verilog, or VHDL; experience with LINT, simulation, and synthesis
  • Strong foundation in semiconductor physics and computer architecture
  • Excellent communication, documentation, and team leadership skills
  • Experience designing with advanced CMOS nodes (?32nm)
  • Familiarity with low-power and radiation-hardened electronics
  • Background in secure system architectures (e.g., cryptographic encoders, tagged processors)
  • Successful tape-outs at advanced nodes
  • Proven leadership of multi-disciplinary design teams



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Contact:

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