Overview
On Site
$45 - $60
Contract - W2
Skills
fpga
pcb
lvds
c
C++
Job Details
A globally leading technology company is looking for an experienced FPGA Engineer to architect, design, and validate RTL for advanced display subsystem prototypes. In this role, you will collaborate with cross-functional teams, contribute to hardware bring-up, and support low-level software integration. Strong skills in digital interface debugging, FPGA tools, and C/C++ firmware development are essential. If you're passionate about innovation and display technology, we invite you to apply!
Job Responsibilities:
- Architect, design, implement, and validate FPGA RTL to enable prototype systems that drive display subsystem.
- Collaborate with cross-functional teams to define RTL specs and plan feature development roadmaps.
- Work closely with software team to write low-level drivers that interface with RTL.
- Drive major aspects of hardware bringup, characterization, and debug in collaboration with other EEs.
- Guide and mentor junior engineers to encourage technical growth and maintain company s high standards
- Promote innovation and new technology to further enhance company's display performance and user experience.
- Create and give presentations before and after prototyping new ideas.
- Communicate and demonstrate prototypes to Cross-Functional Teams.
- Demonstrate creativity in problem solving and adapt quickly to new technical areas.
Skills:
- Hands-on bringup and debug of PCBs that have standard digital interfaces (e.g. SPI, I2C, LVDS, DDR)
- Using standard lab equipment (e.g. multimeters, oscilloscopes, spectrum analyzers) along with FPGA tools such as Chipscope / SignalTap etc
- Able to read board schematics and know EE fundamentals.
- Firmware development using C/C++ programming language.
- Version control systems such as Git, Perforce.
Education:
- Bachelor's Degree or equivalent work experience preferred.
Type: Contract
Duration: 2 months (with a possibility to extend up to 18 months)
Work Location: Sunnyvale, CA (100% on-site)
Pay Range: $ 45.00 - $ 60.00 (DOE)
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