Overview
Remote
Depends on Experience
Contract - Independent
Contract - 3 Month(s)
Skills
ARM
ASIC
Artificial Intelligence
Cloud Computing
Collaboration
DFT
Data Analysis
Debugging
Design For Manufacturability
Documentation
EDA
Integrated Circuit
Machine Learning (ML)
Physical Data Model
RTL
Semiconductors
System On A Chip
SystemVerilog
Technical Writing
Timing Closure
VHDL
VLSI
Verilog
Workflow
LLM Trainer
CLSI
Job Details
Role: LLM Trainer ASIC/VLSI Design
Client: Touring
Enhance a leading AI model for semiconductor design by creating, reviewing, and refining technical datasets, workflows, and documentation for ASIC/SoC development.
Location- Remote,
Responsibilities:
- Build and validate datasets for RTL, verification, synthesis, and physical design.
- Document ARM-based SoC workflows and tape-out processes.
- Simulate, debug, and optimize chip designs.
- Review AI outputs for accuracy and completeness.
- Collaborate with AI/ML engineers to improve model performance.
Requirements:
- 8+ yrs in ASIC/VLSI (RTL, synthesis, physical implementation).
- Successful chip lead experience with <45nm tape-outs.
- ARM processor integration and foundry (TSMC, UMC, GF) expertise.
- Strong Verilog/VHDL/SystemVerilog, timing closure, DFT/DFM, SoC architecture skills.
- Excellent technical writing skills.
Preferred:
- AI/ML tool experience.
- Cloud-based EDA and export-controlled toolchain familiarity.
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