Senior Analog/Mixed-Signal Design Engineer

Overview

On Site
$140,000 - $180,000
Full Time

Skills

Transmitter
Receiver
analog engineer
bias
amps
verilog

Job Details

Senior Analog/Mixed-Signal Design Engineer

 

Join a premier chip and silicon IP provider, is seeking to hire an exceptional Senior Analog/Mixed-Signal Design Engineer to join our Memory Interconnect Design team in San Jose, California. As an Analog/Mixed-Signal Design Engineer, you will play a pivotal role in product designs.

 

Responsibilities

  • Ownership of Analog/Mixed designs at chip and/or block level
  • Implement optimal circuit architectures to achieve competitive product specifications
  • Design, simulate and characterize high-performance and high-speed circuits (e.g. Transmitter, Receiver, ADC, DAC, LDO, PLL, DLL, PI circuits).
  • Create floorplan and work with layout team to demonstrate post extraction performance
  • Document analysis and simulation to show that design achieves critical electrical, timing parameters and pre-silicon verification flow
  • Work with the Lab/System team for test plan, silicon bring up and characterization
  • Create behavior model for verification simulations

 

Qualifications

  • Prior work experience or research thesis in at least one of the following circuits: Transmitter, Receiver (with CTLE, DFE), PLL, DLL, PI, clock distribution
  • Good knowledge of design principles for practical design tradeoffs
  • Fundamental knowledge of basic building blocks like bias, op-amps
  • Experience in designing memory interfaces such as DDR 4/5 or serial links such as PCIE is highly desirable
  • Prior experience or course work in FinFET process and digitally assisted design is desirable
  • Experience in modeling with matlab, Verilog-A, verilog is desirable
  • Experience working in leading R&D and future technology development projects is desirable
  • The position requires good written & verbal communication skills as well a strong commitment and ability to work in cross functional and globally dispersed teams
  • MS EE and 2+ years or PhD EE in CMOS analog/mixed-signal circuit design.

 

Submit resume to

 

Tony Do

x115

 

Type: Fulltime

Location: San Jose, CA

Salary: $140,000 to $180,000. Salary ranges are determined by role, level, and location. Pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.

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About OSI Engineering, Inc.