Overview
Skills
Job Details
Job Title: Analog/Mixed-Signal Layout Engineer
Location: Remote (Bay Area Candidates Only)
Type: Contract
About the Role
We are seeking Analog/Mixed-Signal Layout Engineers with strong expertise in deep sub-micron CMOS circuits and advanced FinFET nodes (7nm and below). This is a remote contract role (Bay Area local candidates only) with opportunities for both senior and junior level engineers.
You will work on analog/mixed-signal, RF, and memory layouts, collaborating with circuit designers and layout leads to deliver robust, high-performance, and production-ready designs.
Requirements
Experience Levels:
Senior Candidates: 10+ years in analog/mixed-signal layout design, with 3+ years on advanced nodes (FinFET).
Junior Candidates: 5+ years in analog/mixed-signal layout design, with at least 1+ years on advanced nodes (FinFET).
Core Expertise:
Analog/Mixed-Signal Layout
Memory Layout & Floor Planning
DDR, RF, ADC, DAC, LDO
Layout floor-planning & hierarchical layout assembly
Device matching, parasitic minimization, RF shielding, high-frequency routing
Guard rings, DNW, PN junctions, LOD, WPE
Technology Experience:
FinFET (7nm or below strongly preferred)
Analog/mixed-signal IP: SERDES PHY, PLL, DDR PHY, ADCs, DACs, LDOs, etc.
Tools:
Cadence Virtuoso XL
Calibre (DRC, ERC, LVS)
Innovus
Mentor Graphics
Skills:
Strong collaboration with designers for planning, scheduling, and trade-offs
Reviewing and analyzing floorplans & circuits
Expertise in DFM, electro-migration, IR drop, RC delay, self-heating, coupling capacitance
Advanced CAD knowledge for delivering robust, low-noise, low-power designs
Excellent written & verbal communication in English
Ability to work effectively in remote team environments
Team Structure
Minimum team size: 5 engineers
Can scale up based on project needs, performance, and deliverables
Training and ramp-up will be provided by vendor company
Why Join?
Work on cutting-edge analog/mixed-signal design projects in advanced nodes
Collaborate with a highly skilled, scalable engineering team
Opportunity to contribute to innovative IP development across RF, memory, and power domains
Apply Now if you re an Analog/Mixed-Signal Layout Engineer looking for your next challenging project in the Bay Area!