R&D Engineering, Architect- 3DIC and Advanced Packaging SIPI

Descriptions & Requirements

Job Description and Requirements

Synopsys is looking for a 3DIC and Advanced Packaging SIPI architect who will perform SIPI analysis for TSV impact to EMIR, HSIO interference, T-coil performance degradation, and other electrical performance impact to IP and SOC. Work with engineers to do 3DIC design partition, floor planning, TSV placement, mockup design, and silicon interposer/bridge design for Synopsys IP, test chip, and chiplet to meet electrical requirement and optimize for thermal performance, come up with design guidelines and best practice, and help customers explore their solution space. Candidates with solid understanding of silicon design, advanced packaging, power grid design, and strong SIPI experience are required. Can-do attitude, quick learning, and solid electronic skills are assets. You will be working with a global, highly skilled and very supportive team.

Responsibilities

• Conducting TSV to TSV coupling, TSV interference to HSIO and SRAM study
• Analyzing T-coil coupling and performance degradation with 3DIC stacking study
• Leading 3DIC design partition, floor planning, IP placement, TSV placement, power grid planning and design
• Performing Power and EMIR analysis, design optimization
• Managing Bump map pin assignment and AP RDL design
• Advanced packaging interposer electrical design, optimization, and post-layout model extraction, end to end simulation
• Conducting eDTC partitioning and PI analysis and generating Design guideline and best practice generation
• Creating IP and chiplet Pre-sales P&R mockup design, simulation and post-sales support
• Interface with Synopsys EDA tool and internal CAD group to build 3DIC and 2.5D design flow

Requirements

• Silicon design and advanced packaging knowledge are required.
• Domain expertise of power grid design, SIPI modeling and simulation.
• EMIR analysis tool expertise and Power modeling

• Strong communication skills and be a team player
• Bachelor/Master of Science in computer engineering or electrical engineering. PhD preferred.
• Minimum of 15+ years of relevant experience

Nice to Have:

• Knowledge and experience of 3DIC, 2.5D advanced packaging silicon interposer and bridge is a plus
• Nice to have backend tools such as Fusion Compiler, Custom Compiler experience

The Team You'll Be A Part Of:

You will be part of a dynamic and innovative team dedicated to pushing the boundaries of 3DIC and advanced packaging technologies. Our team is composed of experts in SIPI, silicon design, and advanced packaging who work collaboratively to develop cutting-edge solutions. Together, we strive to deliver exceptional results and drive the future of technology.
Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about benefits during the hiring process.

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At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.