Overview
On Site
USD 143,000.00 - 215,000.00 per year
Full Time
Skills
C++
High-level design
Place and route
Policies and procedures
Digital design
Systems modeling
Electronic engineering
Computer engineering
Computer science
Programming languages
Software architecture
Product management
Program management
System requirements
Process flow
Circuit design
Technical writing
Decision-making
Problem solving
Wireless communication
Algorithms
Design
OFDM
RF
C
ASIC
Computer hardware
SystemC
HLS
Debugging
Integrated circuit
Change data capture
RTL
Science
Electrical engineering
Scripting
Leadership
IP
System on a chip
Specification
Strategy
Layout
Stratus
Python
Automation
Data Analysis
Supervision
Communication
Negotiations
Planning
Recruiting
Law
Sales
Job Details
Company:Qualcomm Atheros, Inc.
Job Area:Engineering Group, Engineering Group > ASICS Engineering
General Summary:
Working with the WiFi algorithm and systems team to design and test advanced WiFi functionalities such as OFDM and OFDMA modulators and demodulators, transmit beamforming, timing and synchronization, RF impairment correction, adaptive filters
Working with the algorithms/systems/modeling team to obtain a fixed-point/finite-precision C/C++ model that is realizable in optimized ASIC hardware
Converting the finite-precision models into ASIC hardware using SystemC/C++ for HLS(High-Level Synthesis) as the primary hardware description language that meet the area and power targets
Working with the verification engineers to develop unit-level and integrated-level test-benches
Debugging the designs in stand-alone and integrated with the system
Synthesis and gate-level timing tasks related to the designed module and assist with verification and timing of the entire chip
Design quality check such as lint, CDC and low power rule checks
RTL-level and gate-level vector-based power analysis
Minimum Qualifications:
Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
Preferred Qualifications:
Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science.
6+ years of ASIC design, verification, validation, integration, or related work experience.
2+ years of experience with architecture and design tools.
2+ years of experience with scripting tools and programming languages.
2+ years of experience with design verification methods.
1+ year of work experience in a role requiring interaction with senior leadership (e.g., Director level and above).
Principal Duties & Responsibilities:
Leverages advanced ASIC knowledge and experience to define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power products.
Creates advanced architectures, circuit specifications, logic designs, and/or system simulations based on system-level requirements.
Collaborates across functional teams (e.g., software architecture, hardware architecture, product management, program management teams) to develop and execute an implementation strategy that meets system requirements and customer needs.
Evaluates all aspects of complex process flow from high-level design to synthesis, place and route, timing and power use, and verification or similarly for custom circuit design/layout flow.
Utilizes tools/applications (e.g., SystemC HLS to RTL to GDS Flow, Stratus) to execute and enable advanced architecture and design of multiple complex blocks, and Python for large-scale design flow automation and dashboarding"
Writes and reviews detailed technical documentation for complex EDA/IP/ASIC projects.
Level of Responsibility:
Works independently with minimal supervision.
Provides supervision/guidance to other team members.
Decision-making is significant in nature and affects work beyond immediate work group.
Requires verbal and written communication skills to convey complex information. May require negotiation, influence, tact, etc.
Has a moderate amount of influence over key organizational decisions (e.g., is consulted by senior leadership to make key decisions).
Tasks do not have defined steps; planning, problem-solving, and prioritization must occur to complete the tasks effectively.
Although this role has some expected minor physical activity, this should not deter otherwise qualified applicants from applying. If you are an individual with a physical or mental disability and need an accommodation during the application/hiring process, please call Qualcomm's toll-free number found for assistance. Qualcomm will provide reasonable accommodations, upon request, to support individuals with disabilities as part of our ongoing efforts to create an accessible workplace.
Qualcomm is an equal opportunity employer and supports workforce diversity.
To all Staffing and Recruiting Agencies:Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.
EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
Pay range:
$143,000.00 - $215,000.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer!
If you would like more information about this role, please contact .
Job Area:Engineering Group, Engineering Group > ASICS Engineering
General Summary:
Working with the WiFi algorithm and systems team to design and test advanced WiFi functionalities such as OFDM and OFDMA modulators and demodulators, transmit beamforming, timing and synchronization, RF impairment correction, adaptive filters
Working with the algorithms/systems/modeling team to obtain a fixed-point/finite-precision C/C++ model that is realizable in optimized ASIC hardware
Converting the finite-precision models into ASIC hardware using SystemC/C++ for HLS(High-Level Synthesis) as the primary hardware description language that meet the area and power targets
Working with the verification engineers to develop unit-level and integrated-level test-benches
Debugging the designs in stand-alone and integrated with the system
Synthesis and gate-level timing tasks related to the designed module and assist with verification and timing of the entire chip
Design quality check such as lint, CDC and low power rule checks
RTL-level and gate-level vector-based power analysis
Minimum Qualifications:
Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
Preferred Qualifications:
Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science.
6+ years of ASIC design, verification, validation, integration, or related work experience.
2+ years of experience with architecture and design tools.
2+ years of experience with scripting tools and programming languages.
2+ years of experience with design verification methods.
1+ year of work experience in a role requiring interaction with senior leadership (e.g., Director level and above).
Principal Duties & Responsibilities:
Leverages advanced ASIC knowledge and experience to define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power products.
Creates advanced architectures, circuit specifications, logic designs, and/or system simulations based on system-level requirements.
Collaborates across functional teams (e.g., software architecture, hardware architecture, product management, program management teams) to develop and execute an implementation strategy that meets system requirements and customer needs.
Evaluates all aspects of complex process flow from high-level design to synthesis, place and route, timing and power use, and verification or similarly for custom circuit design/layout flow.
Utilizes tools/applications (e.g., SystemC HLS to RTL to GDS Flow, Stratus) to execute and enable advanced architecture and design of multiple complex blocks, and Python for large-scale design flow automation and dashboarding"
Writes and reviews detailed technical documentation for complex EDA/IP/ASIC projects.
Level of Responsibility:
Works independently with minimal supervision.
Provides supervision/guidance to other team members.
Decision-making is significant in nature and affects work beyond immediate work group.
Requires verbal and written communication skills to convey complex information. May require negotiation, influence, tact, etc.
Has a moderate amount of influence over key organizational decisions (e.g., is consulted by senior leadership to make key decisions).
Tasks do not have defined steps; planning, problem-solving, and prioritization must occur to complete the tasks effectively.
Although this role has some expected minor physical activity, this should not deter otherwise qualified applicants from applying. If you are an individual with a physical or mental disability and need an accommodation during the application/hiring process, please call Qualcomm's toll-free number found for assistance. Qualcomm will provide reasonable accommodations, upon request, to support individuals with disabilities as part of our ongoing efforts to create an accessible workplace.
Qualcomm is an equal opportunity employer and supports workforce diversity.
To all Staffing and Recruiting Agencies:Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.
EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
Pay range:
$143,000.00 - $215,000.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer!
If you would like more information about this role, please contact .