Overview
On Site
Contract - W2
Contract - 5 day((s))
Skills
FPGA
VHDL
Model Sim
Questa Sim
Clock Domain Crossing
Static Timing Analysis
Job Details
Job Description
The Senior FPGA Engineer will design new FPGAs or update existing FPGAs, as business conditions dictate. The FPGA design process includes requirements definition, conceptual design, detailed design, and design verification.
The Senior FPGA Engineer should be detail-oriented, self-driven, and able to work independently or with a team.
This position requires expert knowledge of the following items:
1. VHDL
2. Model Sim/Questa Sim
3. Clock Domain Crossing (CDC) Analysis
4. Static Timing Analysis (STA)
5. Self-checking testbenches
The position could also involve:
1. System Verilog
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