Overview
On Site
Accepts corp to corp applications
Contract - W2
Contract - Independent
Contract - 12
Skills
Data analysis
Scripting
ASIC Power engineer
CAD Engineer/Physical Design engineer
power estimation tools
Job Details
Work Location: US - CA Sunnyvale_Onsite
Duties:
- ASIC Power Engineer to perform power analysis and optimizations in ASIC for Meta's AR/VR products.
- Areas of interests includes Machine Learning.
- Primary languages are Python, TCL and System Verilog.
Responsibilities
- Perform PPA optimization with Fusion compiler.
- Perform RTL and netlist level Power analysis
- Perform post-processing and scripting on report log files for format conversion, data analysis and information extraction
- Setup, run, debug and analyze reports of ASIC flows (Synthesis, PD, Power, Timing)
- Implement some blocks at RTL and UPF
- Ability to document and communicate clearly
Minimum Qualifications
- 10+ Years of experience as an ASIC Power engineer, or CAD Engineer/Physical Design engineer
- Experience with power estimation tools and synthesis, some physical design
- Knowledge of power trade-offs in design and back-end implementation
- Hands-on experience in scripting, data analysis
- BS in Electrical Engineering/Computer Science or equivalent experience
Preferred Qualifications
- Synopsys (DC, ICC, PTPX/PrimePower, VCS, Verdi) and/or Cadence (Joules)
- Python, Perl (or similar) scripting and data-post-processing tools
- Excel (or Matlab) for model fitting, data visualization and analysis
- Experience in low power design, tools and methodologies including power intent UPF specifications
- Silicon Power Characterization
- Some power profiling experience at IP/SoC level
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