Overview
On Site
Depends on Experience
Contract - W2
Contract - 1 Year(s)
Skills
FPGA
AXI
Job Details
FPGA Design Engineer need in Lafayette, Colorado for a top Aerospace and Defense Company.
We are working directly with the hiring manager looking for a Digital Design Engineer for complex Field Programmable Gate Array (FPGA) designs used in space applications.
FPGA Design Engineer
A top Aerospace and Defense company
Multiple roles
Location: Lafayette, Colorado
Rate: $50 to $62 per hour on a W2 non-benefitted contract
Required Skill
- BS degree or higher in Electrical Engineering (technical experience reviewed in lieu of alternative degree).
- Over 4 years detailed electronics design experience with at least 2 years of FPGA design experience (verification experience is a plus).
- Design concept discussions, system specifications, system analyses and failure reporting.
- Ability to contribute to technical group discussions.
- Small team environment with enthusiastic technical experts with a willingness to mentor and be mentored.
- Familiarity with clock domain crossing (CDC) tools and FPGA design pitfalls is nice to have.
- Familiar with AXI based design, DMA, and scripting tools.
- Experience with embedded processor-based electronics architecture.
Desired Skill
- FPGA designs based on detailed design requirements using primarily VHDL.
- Design and verify margin, compliance, and fault robustness of high-speed serial interfaces such as 10 Mb /100Mb/1Gb Ethernet, SpaceWire and LVDS interfaces using simulation methods such as UVM, OVM, or a functional test bench (module and system level).
- Capture requirements, create state diagrams, timing diagrams, and other design documentation as required by the design process.
- Design robust Finite State Machines (FSMs) and interface logic.
- Generate FPGA test vectors and simulation test benches, executing them in a verification environment such as ModelSim or QuestaSim.
- Develop constraints for and synthesize FPGA designs using ISE, Libero, Libero SoC, and Vivado tool suites.
- Capable of chip-level and board-level debug in the lab with a variety of test equipment with supervision as needed.
If interested, please send back an updated resume to and I will get back to you with more information.