Overview
On Site
Depends on Experience
Full Time
Skills
Analog Circuits
Ethernet
SERDES
PCI Express
IO
Job Details
Analog SERDES Architect
Onsite - San Jose, CA
Full time
Role Description
iitjobs is looking for an Analog SERDES Architect with 8+ years of hands-on experience in high-speed IO circuit design. The candidate will define and architect analog front-end building blocks for SERDES PHYs at cutting-edge technology nodes. You ll play a key role in developing power-efficient, high-performance SERDES solutions for applications like PCIe, CXL, UCIe, and Ethernet.
Key Responsibilities
- Strong 8+ years of experience
- Architect and design analog/mixed-signal circuits(TX, RX, PLL, CDR, Equalizers, Drivers).
- Perform feasibility analysis, trade-off studies, and power/performance optimization.
- Conduct transistor-level simulations, corner analysis, and modeling.
- Work closely with system and digital teams for co-optimization.
- Lead design reviews and contribute to layout and post-layout verification.
- Support post-silicon bring-up, validation, and debugof SERDES IP.
Qualifications
- 8+ years of hands-on analog design in SERDES/High-Speed IO.
- Strong expertise in PLL/CDR design, equalization techniques, and TX/RX circuits.
- Proficiency with SPICE, Spectre, and other analog design tools.
- Understanding of signal integrity, jitter, channel modeling, and packaging.
- MS/PhD in Electrical Engineering or equivalent (preferred).
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