Overview
On Site
Full Time
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Quest
Integrated Circuit
UVM
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VHDL
ASIC
C
C++
DO-254
Adobe AIR
Altera
Xilinx
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Altera Quartus
Computer Hardware
SystemVerilog
Network Protocols
IPv6
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Python
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PCI Express
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Ethernet
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FC
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English
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Job Details
L3Harris is dedicated to recruiting and developing high-performing talent who are passionate about what they do. Our employees are unified in a shared dedication to our customers' mission and quest for professional growth. L3Harris provides an inclusive, engaging environment designed to empower employees and promote work-life success. Fundamental to our culture is an unwavering focus on values, dedication to our communities, and commitment to excellence in everything we do.
L3Harris Technologies is the Trusted Disruptor in the defense industry. With customers' mission-critical needs always in mind, our employees deliver end-to-end technology solutions connecting the space, air, land, sea and cyber domains in the interest of national security.
Job Title: Lead, FPGA Verification, UVM
Job Code: 28719
Job Location: Palm Bay, FL
Job Schedule: 9/80 (Every other Friday off!)
Relocation: Relocation assistance is available to qualified applicants
Job Description: Seeking talented UVM/Design Verification Engineer, able to work in teams and independently, learn quickly and be productive in a fast paced, dynamic environment.
Essential Functions:
Execute and contribute to the FPGA verification plan
Architect UVM chip level verification environments for multiple FPGAs
Develop reusable agents, top level testbench modules and environments
Define and implement functional coverage model based upon DUT requirements and close code coverage.
Utilize UVM to create drivers, monitors, predictors, and scoreboards based on DUT requirements.
Strong understanding of FPGA design process including requirements generation, preliminary design, peer reviews, detailed design, test plan generation, and integration and test.
Work independently to develop test bench solutions.
Qualifications:
BS Degree in electrical/computer engineering and 9+ years of professional experience, OR, a Masters in electrical/computer engineering and 7+ years of professional experience OR minimum 13 years of prior experience in lieu of degree
5 Years of experience with and understanding of Altera or Xilinx / AMD FPGA architectures
5 years of experience with VHDL
Ability to obtain a US Security Clearance
Preferred Additional Skills:
Experience in ASIC / FPGA verification using C/C++ and/or System Verilog
Experience with DO-254 air worthiness certification
Experience with building and setting up scalable simulation/verification environments.
Experience with and understanding of Altera and/or Xilinx FPGA architectures.
Experience with Vivado and/or Quartus tool suite.
Proficiency with hardware verification languages: System Verilog, System Verilog Assertions
Experience with high speed serial protocols (PCI Express, SRIO, Ethernet)
Experience designing 10G Ethernet based Network Interface Designs
Experience in network protocols including IPv6 and UDP
Experience with SoC (Kintex UltraScale/UltraScale+, Virtex UltraScale/UltraScale+, Zynq UltraScale)
Proficiency with Object Oriented Programming Concepts: Inheritance, Polymorphism, etc.
Proficient in scripting languages: bash/csh, Perl, Python, etc.
Revision Control Systems: svn, git
Proficient in Linux Environments
Constrained Random Verification Experience highly desired.
Experience with packet-based protocols (PCI Express etc.), Network-centric designs (Ethernet, IP, FC).
Experience with high speed memory interfaces (DDRx)
Familiarity with test scoping for complex designs, code coverage, functional coverage, assertions.
Ability to focus on finding design issues, corner cases and out of box ideas to make designs more robust
L3Harris Technologies is proud to be an Equal Opportunity Employer. L3Harris is committed to treating all employees and applicants for employment with respect and dignity and maintaining a workplace that is free from unlawful discrimination. All applicants will be considered for employment without regard to race, color, religion, age, national origin, ancestry, ethnicity, gender (including pregnancy, childbirth, breastfeeding or other related medical conditions), gender identity, gender expression, sexual orientation, marital status, veteran status, disability, genetic information, citizenship status, characteristic or membership in any other group protected by federal, state or local laws. L3Harris maintains a drug-free workplace and performs pre-employment substance abuse testing and background checks, where permitted by law.
Please be aware many of our positions require the ability to obtain a security clearance. In addition, applicants who accept a conditional offer of employment may be subject to government security investigation(s) and must meet eligibility requirements for access to classified information.
By submitting your resume for this position, you understand and agree that L3Harris Technologies may share your resume, as well as any other related personal information or documentation you provide, with its subsidiaries and affiliated companies for the purpose of considering you for other available positions.
L3Harris Technologies is an E-Verify Employer. Please click here for the E-Verify Poster in English or Spanish . For information regarding your Right To Work, please click here for English or Spanish .
L3Harris Technologies is the Trusted Disruptor in the defense industry. With customers' mission-critical needs always in mind, our employees deliver end-to-end technology solutions connecting the space, air, land, sea and cyber domains in the interest of national security.
Job Title: Lead, FPGA Verification, UVM
Job Code: 28719
Job Location: Palm Bay, FL
Job Schedule: 9/80 (Every other Friday off!)
Relocation: Relocation assistance is available to qualified applicants
Job Description: Seeking talented UVM/Design Verification Engineer, able to work in teams and independently, learn quickly and be productive in a fast paced, dynamic environment.
Essential Functions:
Execute and contribute to the FPGA verification plan
Architect UVM chip level verification environments for multiple FPGAs
Develop reusable agents, top level testbench modules and environments
Define and implement functional coverage model based upon DUT requirements and close code coverage.
Utilize UVM to create drivers, monitors, predictors, and scoreboards based on DUT requirements.
Strong understanding of FPGA design process including requirements generation, preliminary design, peer reviews, detailed design, test plan generation, and integration and test.
Work independently to develop test bench solutions.
Qualifications:
BS Degree in electrical/computer engineering and 9+ years of professional experience, OR, a Masters in electrical/computer engineering and 7+ years of professional experience OR minimum 13 years of prior experience in lieu of degree
5 Years of experience with and understanding of Altera or Xilinx / AMD FPGA architectures
5 years of experience with VHDL
Ability to obtain a US Security Clearance
Preferred Additional Skills:
Experience in ASIC / FPGA verification using C/C++ and/or System Verilog
Experience with DO-254 air worthiness certification
Experience with building and setting up scalable simulation/verification environments.
Experience with and understanding of Altera and/or Xilinx FPGA architectures.
Experience with Vivado and/or Quartus tool suite.
Proficiency with hardware verification languages: System Verilog, System Verilog Assertions
Experience with high speed serial protocols (PCI Express, SRIO, Ethernet)
Experience designing 10G Ethernet based Network Interface Designs
Experience in network protocols including IPv6 and UDP
Experience with SoC (Kintex UltraScale/UltraScale+, Virtex UltraScale/UltraScale+, Zynq UltraScale)
Proficiency with Object Oriented Programming Concepts: Inheritance, Polymorphism, etc.
Proficient in scripting languages: bash/csh, Perl, Python, etc.
Revision Control Systems: svn, git
Proficient in Linux Environments
Constrained Random Verification Experience highly desired.
Experience with packet-based protocols (PCI Express etc.), Network-centric designs (Ethernet, IP, FC).
Experience with high speed memory interfaces (DDRx)
Familiarity with test scoping for complex designs, code coverage, functional coverage, assertions.
Ability to focus on finding design issues, corner cases and out of box ideas to make designs more robust
L3Harris Technologies is proud to be an Equal Opportunity Employer. L3Harris is committed to treating all employees and applicants for employment with respect and dignity and maintaining a workplace that is free from unlawful discrimination. All applicants will be considered for employment without regard to race, color, religion, age, national origin, ancestry, ethnicity, gender (including pregnancy, childbirth, breastfeeding or other related medical conditions), gender identity, gender expression, sexual orientation, marital status, veteran status, disability, genetic information, citizenship status, characteristic or membership in any other group protected by federal, state or local laws. L3Harris maintains a drug-free workplace and performs pre-employment substance abuse testing and background checks, where permitted by law.
Please be aware many of our positions require the ability to obtain a security clearance. In addition, applicants who accept a conditional offer of employment may be subject to government security investigation(s) and must meet eligibility requirements for access to classified information.
By submitting your resume for this position, you understand and agree that L3Harris Technologies may share your resume, as well as any other related personal information or documentation you provide, with its subsidiaries and affiliated companies for the purpose of considering you for other available positions.
L3Harris Technologies is an E-Verify Employer. Please click here for the E-Verify Poster in English or Spanish . For information regarding your Right To Work, please click here for English or Spanish .
Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.