Senior ASIC Design Engineer, Kuiper ASIC Design

    • Amazon Kuiper Manufacturing Enterprises LLC
  • Austin, TX
  • Posted 36 days ago | Updated 21 hours ago

Overview

On Site
Full Time

Skills

Broadband
ASIC
Firmware
Emulation
IP
Intellectual Property
DFT
Test Plans
Debugging
Integrated Circuit
Satellite
Interfaces
Embedded Systems
CMOS
Design Patterns
Digital Design
System On A Chip
RTL
IIR
Digital Signal Processing
Software Development
Version Control
Management
Testing
Wireless Communication
OFDM
Computer Science
Amazon Web Services
SAP BASIS
Onboarding
Recruiting

Job Details

Project Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world.

Export Control Requirement:

Key job responsibilities
Key job responsibilities

RTL Design and development of custom blocks.

Integration of large subsystems

Gate Level Simulation: Develop and maintain comprehensive gate-level simulation test plans for verifying ASIC functionality and timing. Analyze simulation results, identify and debug logic errors, and propose solutions. Work closely with design and verification engineers to validate fixes and ensure design closure.

Facilitate seamless integration across Firmware, RTL, Platform Software, and Platform Drivers.

Develop Debug tools: RTL Emulation, silicon bring-up, and functional validation.

In this role you will:
Work closely with the system architects to develop world-class SOC and IP blocks, which meet power, area and performance targets.
Define, configure and integration SoC Subsystems
Contribute to the SoC floor planning effort
Define and develop any necessary support logic
Configure, instantiate and integrate 3rd party IP blocks
Understand low power design & the impact of DFT on the blocks
Perform initial synthesis & timing analysis
Assist verification team in unit verification including test plan development
Assist with debug and bring-up

A day in the life
Be part of Project Kuiper's sub-team responsible for defining and implementing the digital chip SOCs for communications via Low Earth Orbit satellites and Amazon gateways. This is a unique opportunity to define a groundbreaking wireless solution with few legacy constraints. The team works with customer requirements and wireless system teams to define modems, high-speed interfaces, embedded processors, and DSP solutions in latest CMOS generation technologies.

BASIC QUALIFICATIONS

- 8+ years of non-internship professional software development experience
- 8+ years of programming with at least one software programming language experience -
- 8+ years of leading design or architecture (design patterns, reliability and scaling) of new and existing systems experience
- 8+ years of digital design experience, preferably in SoC design and implementation
- Fixed point RTL design
- Filter design (FIR/IIR)
- DSP design

PREFERRED QUALIFICATIONS

- 5+ years of full software development life cycle, including coding standards, code reviews, source control management, build processes, testing, and operations experience
- Modem wireless or OFDM experience
- Master's degree in computer science or equivalent

Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.

Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit for more information. If the country/region you're applying in isn't listed, please contact your Recruiting Partner.
Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.