Overview
On Site
Contract - W2
Contract - 12 day((s))
Skills
EDA
Job Details
Role: Silicon Design Package Engineer
Location:Santa Clara, CA
Location:Santa Clara, CA
This role is highly specialized in semiconductor packaging design, requiring strong EDA tool proficiency and knowledge of advanced packaging technologies
Tools & Knowledge:
Mentor/Siemens and Cadence tools (especially for Package Layout Automation - PLA).
Technical Expertise:
Multi-layer package design experience.
Understanding of substrate manufacturing Design Rules and Assembly Rules.
Familiarity with SIPI (Signal Integrity & Power Integrity) Rules.
Flip-chip package design concepts
Tools & Knowledge:
Mentor/Siemens and Cadence tools (especially for Package Layout Automation - PLA).
Technical Expertise:
Multi-layer package design experience.
Understanding of substrate manufacturing Design Rules and Assembly Rules.
Familiarity with SIPI (Signal Integrity & Power Integrity) Rules.
Flip-chip package design concepts
Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.