Sr. Physical Design Technology Methodology Lead

    • Samsung Electronics America
  • Austin, TX
  • Posted 51 days ago | Updated 1 hour ago

Overview

On Site
USD 174,557.00 - 270,563.00 per year
Full Time

Skills

Research and development
High performance computing
Place and route
Physical data model
Intellectual property
Circuit analysis
Computer science
Life insurance
Leadership
Semiconductors
ACL
Pure Data
GPU
Planning
Documentation
Design
Extraction
EMIR
Scripting
Software development
Tcl
Perl
Shell
Python
Collaboration
Communication
Roadmaps
Graphics design
Smartphones
Scalability
FOCUS
Authorization
Privacy
Policies
Electronics
Law

Job Details

Position Summary

Samsung, a world leader in advanced semiconductor technology, is founded on a simple philosophy - the endless pursuit of excellence will create a better world for all. At Samsung Austin Research and Development Center (SARC) and Advanced Computing Lab (ACL), we are building a center of excellence for Intellectual Property (IP) that is applied to high-performance computing devices (mobile, automotive, and other custom market segments) consumed by millions of people around the world. Come build with us!

Role and Responsibilities

As a Senior Physical Design (PD) Technology Methodology Lead, you will be at the forefront of new technology introduction for SARC/ACL premium IP. You will establish methodologies and solutions to solve new and challenging technical problems in cutting-edge technology (2nm and beyond). Your innovative resolutions will serve as the anchor point for the PD team to drive PPA and execution for differentiating IP.

You will have the unique opportunity to experiment, lead, and contribute to Samsung's current and next-generation mobile GPU, while broadening your knowledge in different aspects of GPU development. Depending on your knowledge and experience as demonstrated during the interview process, your journey with SARC/ACL might start at a higher job level.

  • You are an expert in one or more areas of semiconductor technology, with strong technical depth and breadth knowledge of physical design methodologies and circuit analysis.
  • You are passionate about driving new physical design methodology improvements based on technology-related changes.
  • You are skilled at leading, planning, and executing strategies on DTCO experiments
  • You're a lifelong learner. You will actively participate in silicon learning while leveraging to drive improvement for future technologies.
  • You get excited about driving circuit-level analysis to guide recipe development in Physical Design Execution.
  • You are energized by collaborating with the technology organization to proactively track and review upcoming changes.
  • You lead by example by maintaining thorough documentation of design methodology strategies, results, and best practices, and communicate findings to relevant teams and stakeholders.


Skills and Qualifications

Minimum Requirements:
  • 10+ years of experience with a Bachelor's Degree in Computer Science/Engineering, or 8+ years of experience with a Master's Degree, or 6+ years of experience with a PhD
  • Broad and deep knowledge of Physical Design & Sign-off methodology flows, including place and route, parasitic extraction, static timing, EMIR analysis, DRC, and power analysis
  • Circuit level analysis and understanding of advanced nanometer technology
  • Proficient scripting/programming skills in TCL, Perl, Shell, and/or Python
  • Strong leadership, collaboration, and communication skills
  • DTCO experience is a plus
  • Experience with Silicon to Physical-Design correlation is a plus


Our Team

We're building a team of talented individuals with diverse skill sets to build a technology roadmap and deliver market-leading GPU. Our Physical Design group is part of the larger Design Implementation team at SARC/ACL. We believe in connecting your area of expertise with the right level and functional discipline that can empower you to grow.

Our Xclipse GPU is the first mobile GPU with ray tracing technology that enables console-level graphic for Samsung Galaxy smartphones. With architecture scalability at the frontier of our design focus, our performance- and power-optimized IP solution gets integrated into complex semiconductor products, aiming to reach multiple market segments.

Pay Transparency

At Samsung - SARC/ACL, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $174,557 and $270,563. Your actual base pay will depend on variables that may include your education skills, qualifications, experience, and work location.

Samsung employees have access to benefits including: medical, dental, vision, life insurance, 401(k), free onsite lunch, employee purchase program, tuition assistance (after 6 months), paid time off, student loan program, wellness incentives, and many more. In addition, regular full-time employees (salaried or hourly) are eligible for MBO bonus compensation, based on company, division, and individual performance.

Additionally, this role might be eligible to participate in long term incentive plan and relocation.

U.S. Export Control

This position requires the ability to access information subject to U.S. export control restrictions. Applicants must have the ability to access export-controlled information or be eligible to receive a government authorization to access export-controlled information.

Trade Secrets

By submitting an application, you [applicant] agree[s] not to disclose to Samsung, or induce Samsung to use, any confidential or proprietary information (including trade secrets) belonging to any current or previous employer or other person or entity.

#SARC

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