DFT Engineer Jobs in California

1 - 7 of 7 Jobs

DFT/DFD Verification Engineer - Advanced SoC ProjectsJob Title - DFT/DFD Verification Engineer - Advanced SoC Projects

Yoh - A Day & Zimmerman CompanyCompany Name - Yoh - A Day & Zimmerman Company

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Remote or Santa Clara, California, USA

Full-time

DFT/DFD Verification Engineer Advanced SoC Projects We are looking for a seasoned Design-for-Test / Design-for-Debug Verification Engineer focused on validating sophisticated test and debug logic within next-generation SoCs. This position involves verifying scan architectures such as JTAG, iJTAG, and other internal debug features to support robust manufacturing testability and effective post-silicon debugging. The role will require tight collaboration with engineering teams across design, integ

Senior DFT EngineerJob Title - Senior DFT Engineer

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Santa Clara, California, USA

Full-time

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a "learning machine" that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life's work, to amplify human

DFT Engineer (Server)Job Title - DFT Engineer (Server)

Qualcomm TechnologiesCompany Name - Qualcomm Technologies

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San Diego, California, USA

Full-time

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. The Digital ASIC Design Team is currently seeking candidates who will be responsible for the implementation and verification of advanced DFT/

DFT Lead EngineerJob Title - DFT Lead Engineer

SVK Technology SolutionsCompany Name - SVK Technology Solutions

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California, USA

Third Party

Role: DFT Lead Engineer Location: California (Relocation is fine) EXP: 7 to 10 yrs 1. Good experience in Scan insertion and ATPG (Cadence tools) 2. Good experience in RTL MBIST insertion using Cadence tools (PMBIST) 3. Good Knowledge on JTAG for Boundary scan and IP testing.

Distinguished Engineer, Test Engineering - DFT Operations Interface and IP Test MethodologyJob Title - Distinguished Engineer, Test Engineering - DFT Operations Interface and IP Test Methodology

Marvell Semiconductor Inc.Company Name - Marvell Semiconductor Inc.

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Irvine, California, USA

Full-time

About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and be

DFT Methodology - Data Analytics EngineerJob Title - DFT Methodology - Data Analytics Engineer

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Santa Clara, California, USA

Full-time

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a "learning machine" that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life's work, to amplify huma

Tester with PCB DFTJob Title - Tester with PCB DFT

Inherent TechnologiesCompany Name - Inherent Technologies

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Santa Clara, California, USA

Third Party, Contract

Keywords : Automation testing, DFT, Manufacturing testing, Test fixture design, Board Bring up, failure mode tracking JD : 1. Work on PCB DFT w.r.t. ICT fixture design with maximum coverage 2. Boundary scan development (x1149 analyzer) with maximum coverage 3. Take care of Functional Test Coverage by Reviewing schematics and providing MFG test requirements to the Diagnostic team to verify all HW components. (maximum coverage) 4. Work with the HW team for board bring up and document all failure