LEC Jobs in San Jose, CA

1 - 5 of 5 Jobs

Logic (RTL) Design EngineerJob Title - Logic (RTL) Design Engineer

GAC Solutions Inc.Company Name - GAC Solutions Inc.

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Santa Clara, California, USA

Full-time, Part-time, Contract, Third Party

Job Description: Logic (RTL) Design Engineer Location: Santa Clara, CA No remote, but hybrid option may be negotiated Roles/Responsibilities: The RTL Engineer performs detailed block design from system requirements and evolving specifications. Perform RTL coding, Lint checks, CDC tests, creating timing constraint file. Working closely with Synthesis, STA, PD and DFT teams to meet all functional requirements, performance, power, and area goals Requirements: Bachelor's degree in electrical or c

Senior ASIC Synthesis EngineerJob Title - Senior ASIC Synthesis Engineer

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Remote or Santa Clara, California, USA

Full-time

Come be a part of new process technology adoption by joining NVIDIA's Advanced Technology Group! Work as part of the advanced technology team to optimize design tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior ASIC Synthesis Engineer to join our dynamic and growing team! If you are problem solver and highly motivated individual searching for a collaborative and exciting role, join us today. We encourage applicants with a history of proven success working

Applications Engineering, Sr Staff Engineer - 10787Job Title - Applications Engineering, Sr Staff Engineer - 10787

Synopsys, Inc.Company Name - Synopsys, Inc.

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Sunnyvale, California, USA

Full-time

Descriptions & Requirements Job Description and Requirements We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly

STA Engineer/SDC EngineerJob Title - STA Engineer/SDC Engineer

Prismagic Solutions IncCompany Name - Prismagic Solutions Inc

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San Jose, California, USA

Contract

About the Role:Seeking an experienced STA/SDC engineer to own block and full-chip constraints, perform Static Timing Analysis (PrimeTime/Tempus), and collaborate with design and physical design teams for timing closure. Key Skills: Strong expertise in STA and SDC constraints (functional & test modes) Experience with PrimeTime, Tempus, and synthesis tools (Synopsys DC/DCG/FC) Verilog/SystemVerilog design knowledge CDC/glitch analysis (Spyglass CDC), Formal Verification (Formality, LEC) Scripting

STAEngineerJob Title - STAEngineer

CloudiousCompany Name - Cloudious

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San Jose, California, USA

Contract

Position: STA Engineer Location: San Jose CA (Day-1 Onsite) Must have/Primary skills: Fullchip timing, SDC changes back to block level, Block/Full chip SDC development, Static Timing Analysis, Primetime/Tempus What You'll Be Doing: Being a member of design team who oversees fullchip SDCs and works with physical design and DFT teams to close fullchip timing in multiple timing modes. Option to also do block level RTL design or block or top-level IP integration. Helping develop efficien