Tcl Jobs

141 - 160 of 192 Jobs

Physical Design Methodology EngineerJob Title - Physical Design Methodology Engineer

BOTG LLCCompany Name - BOTG LLC

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Austin, Texas, USA

Full-time

Title: Physical Design Methodology Engineer Location: Austin, TX Duration: Direct Hire Direct Client About the Role As a Physical Design Methodology Engineer within the Integration HUB (IHUB) team, you will be building innovative integration techniques to enable best-in-class physical design on the latest process nodes! Our team has a diverse set of engineers working across five design centers globally, servicing both internal and external partners around the world. The primary role combines br

Next-Gen, High-Speed Memory Subsystem, Low-power ASIC design engineerJob Title - Next-Gen, High-Speed Memory Subsystem, Low-power ASIC design engineer

Qualcomm TechnologiesCompany Name - Qualcomm Technologies

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San Diego, California, USA

Full-time

Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group > ASICS Engineering General Summary: Qualcomm is the world leader in wireless ICs powering the majority of 4G and 5G devices and the largest fabless semiconductor company in the world. Qualcomm is looking for bright ASIC engineers with excellent analytical and technical skills, and a focus on low power, high performance ASIC designs, and, ability to execute critical power analysis of critical design IPs for pat

FPGA DSP Firmware Design EngineerJob Title - FPGA DSP Firmware Design Engineer

LeidosCompany Name - Leidos

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San Diego, California, USA

Full-time

Description The Electronic Warfare Division of the Leidos Innovation Cen is looking for a FPGA DSP Firmware Design Engineer to work with a multi-disciplined design team (electrical engineers, systems engineers, scientists, etc) to design, develop, simulate, and integrate challenging DSP FPGA designs and RF sensor systems based on given project requirements. Candidate will have a strong background in Digital Signal Processing (DSP) algorithms and their implementation in MATLAB and FPGAs in suppo

FPGA DSP Firmware Design EngineerJob Title - FPGA DSP Firmware Design Engineer

LeidosCompany Name - Leidos

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St. Petersburg, Florida, USA

Full-time

Digital Verification Hardware EngineerJob Title - Digital Verification Hardware Engineer

HII Mission TechnologiesCompany Name - HII Mission Technologies

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Roanoke, Virginia, USA

Full-time

Requisition Number: 17457 Required Travel: 0 - 10% Employment Type: Full Time/Salaried/Exempt Security Clearance: Ability to Obtain Level of Experience: Mid This opportunity resides with Cyber & Electronic Warfare, a business group within HII's Mission Technologies division. HII works within our nation's intelligence and cyber operations communities to defend our interests in cyberspace. Our deep expertise in network architecture, software and hardware development, cybersecurity and the electro

Senior Verification Digital EngineerJob Title - Senior Verification Digital Engineer

HII Mission TechnologiesCompany Name - HII Mission Technologies

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Roanoke, Virginia, USA

Full-time

Requisition Number: 17459 Required Travel: 0 - 10% Employment Type: Full Time/Salaried/Exempt Security Clearance: Ability to Obtain Level of Experience: Senior This opportunity resides with Cyber & Electronic Warfare, a business group within HII's Mission Technologies division. HII works within our nation's intelligence and cyber operations communities to defend our interests in cyberspace. Our deep expertise in network architecture, software and hardware development, cybersecurity and the elec

Senior Digital Hardware Design EngineerJob Title - Senior Digital Hardware Design Engineer

HII Mission TechnologiesCompany Name - HII Mission Technologies

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Roanoke, Virginia, USA

Full-time

Requisition Number: 17458 Required Travel: 0 - 10% Employment Type: Full Time/Salaried/Exempt Security Clearance: Ability to Obtain Level of Experience: Senior This opportunity resides with Cyber & Electronic Warfare, a business group within HII's Mission Technologies division. HII works within our nation's intelligence and cyber operations communities to defend our interests in cyberspace. Our deep expertise in network architecture, software and hardware development, cybersecurity and the elec

Mixed Signal Verification EngineerJob Title - Mixed Signal Verification Engineer

Everest Consultants, IncCompany Name - Everest Consultants, Inc

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Hillsboro, Oregon, USA

Full-time

Title: Mixed Signal Verification Engineer Location: Hillsboro, OR (hybrid) ** Our client, a leader in the test-and-measurement, wireless communications, and cyber-security industries, has an immediate need for a highly motivated Mixed Signal Verification Engineer to join their team in designing the next generation data convertors for their world class test equipment. This is a small team environment in a great location that is very collaborative with close personal interactions. The selected i

Pick Developer - Seffner, FLJob Title - Pick Developer - Seffner, FL

Dexian DISYSCompany Name - Dexian DISYS

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Seffner, Florida, USA

Full-time, Contract

Position: Pick Developer Location: Seffner, FL Duration: CTH What you'll be doing: Maintaining files in the Universe database Completing existing and new projects as assigned Writing basic programs using TCL Constructing TCL statements Retrieve (TCL), ProVerb (proc), UniObjects, C++ preferred What we're looking for: 7+ years working with multivalued Universe / Pick / U2 / Unidata database language(s) required Bachelor's degree is preferred, but work experience equivalent may be substituted Exp

Physical Design- Engineer (CAD flow)Job Title - Physical Design- Engineer (CAD flow)

HCL America Inc.Company Name - HCL America Inc.

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Sunnyvale, California, USA

Full-time

Physical Design- Engineer (CAD flow) Sunnyvale, CA - Strong aptitude for programming and automation. - Hands-on experience in development of end-2-end PD and sign-off flows from scratch supporting multiple EDA vendors and foundry nodes. - Proficiency in programming/scripting languages Python, YAML and TCL

Integration EngineerJob Title - Integration Engineer

ApTaskCompany Name - ApTask

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Austin, Texas, USA

Full-time

Position Title: Integration Engineer Job Location: Austin, TX or Sunnyvale, CA (Onsite) Job Type: Contract (Only W2) / FTE JOB DESCRIPTION: Experience in configuration of Teamcenter to other application integration using T4E (Active integration Gateway)Must have Strong expertise experience in T4EA platformMust have experience in C++Must have experience in TCL scripting to write T4EA custom integrationMust have strong experience in using T4EA BGS & GSShould have experience in troubleshooting, mon

RTL Design EngineerJob Title - RTL Design Engineer

SGS ConsultingCompany Name - SGS Consulting

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Santa Clara, California, USA

Contract

JOB DESCRIPTION: JOB DUTIES: Responsible for RTL design using Verilog HDL for implementation and debug. Read and comprehend System on Chip level architectural specification. Write microarchitecture specification for new and modified functions. Responsible for linting and simulation of design. Work with synthesis and backend teams for physical implementation.EDUCATION: Bachelor's or master s in computer engineeringKEY RESPONSIBILITIES: Perform RTL design of digital components in Verilog/system

Verification EngineerJob Title - Verification Engineer

Happiest Minds Technologies LimitedCompany Name - Happiest Minds Technologies Limited

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Fremont, California, USA

Third Party, Contract

Verification Engineer Fremont, CA BSEE or BSCS, or equivalent 5+ years of ASIC/FPGA verification experience using SystemVerilog / UVMMust have experience with:Verification flow using Questa simulationDeveloping verification plansDesigning and implementing SystemVerilog / UVM test benches for constrained-random verificationDeveloping functional coverage modelsWriting and debugging directed and random test casesExperience with automation/scripting (Python, Perl, sed, awk, tcl/tk, sh)Experience wit

Physical Design Engineer - PTPXJob Title - Physical Design Engineer - PTPX

SGS ConsultingCompany Name - SGS Consulting

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Remote

Contract

Job Description: 10+ Years of experience in backend implementation such as synthesis, timing closure, power analysis etc.Experience with power analysis and tools like PTPX (must have).Experience with RTL Synthesis and design optimization for Power, Performance, Area.Experience with EDA tools and scripting languages (Python, TCL) used to build tools and flows for complex environments.Experience with communicating across functional internal teams and vendors.Bachelor s degree in computer science,

Senior RTL Design EngineerJob Title - Senior RTL Design Engineer

ZealTech, Inc.Company Name - ZealTech, Inc.

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San Jose, California, USA

Contract

RTL Design Engineer - Senior Responsible for RTL design using Verilog HDL for implementation and debug. Read and comprehend System on Chip level architectural specification. Write microarchitecture specification for new and modified functions. Responsible for linting and simulation of design. Work with synthesis and backend teams for physical implementation. EDUCATION: Bachelor's or Master's in Computer Engineering KEY RESPONSIBILITIES: Perform RTL design of digital components in Verilog/system

STA EngineerJob Title - STA Engineer

Xoriant CorporationCompany Name - Xoriant Corporation

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San Jose, California, USA

Contract

Title: Physical Design STA Engineer Location: San Jose, CA 95134 Duration: 6 Months+ Job Description: Sr. STA Engineer with 15+ years experience for STA position (Physical Design Static Timing Analysis / STA Engineer).Perform static timing analysis (STA) and timing optimization, generate and verifies timing constraints, performs SI/Noise analysis, and fixes timing & noise violations at full chip/block level for SoCs.Strong understanding of digital design concepts, including synthesis, timing

Full time Role :: Integration Engineer :: Austin, TXJob Title - Full time Role :: Integration Engineer :: Austin, TX

TekShapersCompany Name - TekShapers

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Austin, Texas, USA

Full-time

Hello My name is Amit Kumar and I am a Staffing Specialist at Tekshapers Inc. I am reaching out to you on an exciting job opportunity with one of our clients. Integration Engineer Austin, TX Full time Experience in configuration of Teamcenter to other application integration using T4E (Active integration Gateway) Must have Strong expertise experience in T4EA platform Must have experience in C++ Must have experience in TCL scripting to write T4EA custom integration Must have strong experienc

FPGA EngineerJob Title - FPGA Engineer

MindteckCompany Name - Mindteck

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Vancouver, British Columbia, Canada

Contract

Job Description : RTL partitioning to fit in multiple FPGAs FPGA Build including RTL to Bit-file generation and adding Debug hooks within FPGA such as Signaltap Downloading Bit-file and Running Software on the FPGA Perl, TCL scripting skills; Debugging issues on the FPGA Build emulation and FPGA models and solutions from RTL design using synthesis, partitioning, and routing tools. Evaluate the implemented design in terms of timing closure and resource utilization and scale up the design into ful

ASIC Physical Designers - IIIJob Title - ASIC Physical Designers - III

MindlanceCompany Name - Mindlance

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Remote

Contract

100% Remote Job Responsibilities: Collaborate with the design team to understand and define physical design specifications for mixed signal circuits. Perform floor planning, power planning, and placement of digital and analog blocks. Physical design validation involving static timing and noise analysis. Power grid characterization and analysis using industry standard tools. Troubleshoot and resolve physical design issues and implement design changes. Work with DRC/LVS teams to ensure desig

RTL/ASIC Design EngineerJob Title - RTL/ASIC Design Engineer

NetwovenCompany Name - Netwoven

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San Jose, California, USA

Contract

KEY RESPONSIBILITIES: Microarchitecture development of IP subsystems Perform RTL design of digital components. Work with functional verification team to meet coverage and quality standards. Analyze/fix Lint and CDC errors of the components. Guarantee quality/timely deliverables meeting project s schedule. Help to improve/automate design process. Support post-silicon product bring-up/debug. PREFERRED EXPERIENCE: 10 years' experience in RTL coding Knowledge of PCIe Gen5 and PIPE specification Kno