UVM Jobs in San Jose, CA

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Principal FPGA Design Engineer

Draper

Remote or Cambridge, Massachusetts, USA

Full-time

Overview: Draper is an independent, nonprofit research and development company headquartered in Cambridge, MA. The 2,000+ employees of Draper tackle important national challenges with a promise of delivering successful and usable solutions. From military defense and space exploration to biomedical engineering, lives often depend on the solutions we provide. Our multidisciplinary teams of engineers and scientists work in a collaborative environment that inspires the cross-fertilization of ideas

Principal Verification Engineer

OSI Engineering, Inc.

San Jose, California, USA

Full-time

A leading chip and silicon IP provider is looking to hire a talented Principal Verification Engineer to join its Memory Interconnect Design team in either San Jose, CA or Morrisville, NC. This is a great opportunity to work alongside some of the industry's top engineers to help develop cutting-edge technologies that accelerate and secure data. In this full-time role, the Principal Verification Engineer will report to the Director of Design Engineering and take a key role in product development

Silicon DD Engineer III

BCforward

Palo Alto, California, USA

Contract

Silicon DD Engineer BCforward is currently seeking a highly motivated Silicon DD Engineer Role for a Remote Role! Position Title: Silicon DD Engineer Location: Remote Anticipated Start Date: 8/11/25 Please note this is the target date and is subject to change. BCforward will send official notice ahead of a confirmed start date. Expected Duration: 12+ Months Job Type: Contract - [FULL TIME (40 Hours a week)] Pay Range: $78.72/hr-$82.58/hr Please note that actual compensation may vary wi

DV Engineers DDR (either IP or SoC level experience)- Remote

E-Solutions, Inc.

California, USA

Full-time, Third Party, Contract

Role: DV Engineers DDR (either IP or SoC level experience) Work Location: USA (Remote) Experience: 10+ Years Key Responsibilities: Define and implement verification strategies and test plans for DDR memory interface designs. Develop UVM/SystemVerilog-based testbenches and reusable verification components. Perform protocol-level verification for DDR memory interfaces and validate compliance. Collaborate with architecture, RTL, and system teams to understand design intent and corner cases. Own f

ASIC Verification Engineer

Yoh - A Day & Zimmerman Company

Remote or Monte Sereno, California, USA

Full-time

ASIC Verification Engineer Reviewing the product designs and noting likely points of failure. Designing verification methodology based on product designs and failure points. Determining testing environments and verification tools. Planning the method of sequence for testing operations. Instituting and tweaking testing mechanisms and protocols. Writing up final test procedures and training QC staff. Qualificatios Bachelor s or Master s in Electrical or Computer Science 4 years of Design Verificat