asic verification engineer Jobs in california

21 - 40 of 66 Jobs

ASIC Engineer, Formal VerificationJob Title - ASIC Engineer, Formal Verification

VeearCompany Name - Veear

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Sunnyvale, California, USA

Contract

Requirements: Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.5+ years of experience in Formal VerificationExperience with Formal Verification applications including Datapath, sequential equivalence, Xprop, Clock Gating, connectivity etcProven understanding of Formal Verification methodologies, complexity reduction techniques and abstraction techniquesProven analytical skills to craft Client solutions to tackle industry-le

ASIC Design Engineer STA & SDC SpecialistJob Title - ASIC Design Engineer STA & SDC Specialist

Della InfotechCompany Name - Della Infotech

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San Jose, California, USA

Third Party, Contract

Minimum Qualifications Bachelor's Degree in Electrical or Computer Engineering with 7+ years of ASIC or related experience or Master's Degree in Electrical or Computer Engineering with 5+ years of ASIC or related experience Experience with block/full chip SDC development in functional and test modes. Experience in Static Timing Analysis and prior working experience with STA tools like PrimeTime/Tempus Understanding of related digital design concepts (eg. clocking and async boundaries) Experience

ASIC and/or FPGA Design & Verification Engineer (Lead, Senior or Principal)Job Title - ASIC and/or FPGA Design & Verification Engineer (Lead, Senior or Principal)

Boeing CompanyCompany Name - Boeing Company

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Huntington Beach, California, USA

Full-time

ASIC and/or FPGA Design & Verification Engineer (Lead, Senior or Principal) Company: The Boeing Company Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC and/or FPGA Design and Verification Engineers (Lead, Senior or Principal) to join us as part of our Boeing Electronic Products team at the heart of Boeing's products; ASICs and FPGAs in Huntington Beach or El Segundo, CA. From complex digitally beamformed phased arrays for constellation satellite prog

Custom SOC IP Verification EngineerJob Title - Custom SOC IP Verification Engineer

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Santa Clara, California, USA

Full-time

NVIDIA is seeking a Senior Custom SOC/IP Verification Engineer to verify the next generation SoC and IP solutions! We are looking for special individuals with desire to deliver innovative products. Together, we will build the next generation of life changing custom SOCs! If you are a motivated individual that understands how complex SOC and IPs are built, has intimate knowledge of client requirements, and understand various development cycles, this is your place to be. This role specifically req

Senior ASIC Engineer, Static Timing AnalysisJob Title - Senior ASIC Engineer, Static Timing Analysis

Infobahn Softworld Inc.Company Name - Infobahn Softworld Inc.

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Santa Clara, California, USA

Contract, Third Party

Role Title: Senior ASIC Engineer, Static Timing Analysis Location: San Jose, CA Onsite Alternate location: Colorado office - Longmont Remote is an option for right fit Duration: 12+ months contract Description: Responsible for the development of complex multi-mode / multi-corner timing constraints that are compatible for RTL and signoff Drive the pre-route timing checks and QoR clean up to eliminate SDC issues and ensure a quality handoff for STA checks Requires a mix of SDC knowledge, EDA

ASIC Implementation EngineerJob Title - ASIC Implementation Engineer

Broadcom CorporationCompany Name - Broadcom Corporation

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San Jose, California, USA

Full-time

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Job Description: ASIC implementation engineer with demonstrated expertise in multiple disciplines including synthesis, design for test, floorplanning, place and route, clock methodology, power planning and analysis, timing closure, signal integrity and

Senior ASIC Timing EngineerJob Title - Senior ASIC Timing Engineer

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Remote or Santa Clara, California, USA

Full-time

Come be a part of new process technology adoption by joining NVIDIA's Advanced Technology Group! Work as part of the advanced technology team to optimize design tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior ASIC Timing Engineer to join our dynamic and growing team! If you are problem solver and highly motivated individual searching for a collaborative and exciting role, join us today. We encourage applicants with a history of proven success working in

Sr. ASIC Modem Design Engineer, Project KuiperJob Title - Sr. ASIC Modem Design Engineer, Project Kuiper

Amazon Kuiper Manufacturing Enterprises LLCCompany Name - Amazon Kuiper Manufacturing Enterprises LLC

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San Diego, California, USA

Full-time

Project Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world.Come work at Amazon!We're hiring a Sr. Modem Design Engineer within a high performance ASIC design team. This team is using industry leading methodologies to develop proprietary IP's. The Role:Be part of Project Kuiper's sub-team responsible for defining and implementing the digital chip S

Sr. ASIC Modem Design Engineer, Project KuiperJob Title - Sr. ASIC Modem Design Engineer, Project Kuiper

Amazon Kuiper Manufacturing Enterprises LLCCompany Name - Amazon Kuiper Manufacturing Enterprises LLC

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San Diego, California, USA

Full-time

Project Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. Come work at Amazon! We're hiring a Sr. Modem Design Engineer within a high performance ASIC design team. This team is using industry leading methodologies to develop proprietary IP's. The Role: Be part of Project Kuiper's sub-team responsible for defining and implementing the digital c

Senior Reset and Boot ASIC EngineerJob Title - Senior Reset and Boot ASIC Engineer

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Remote or Santa Clara, California, USA

Full-time

NVIDIA is looking for a Senior Reset and Boot ASIC Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 fueled the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a "learning machine" that constantly evolves by adapting to new opportunities that are hard to pursue, that o

ASIC/RTL Design Engineer - Senior at San Jose, CAJob Title - ASIC/RTL Design Engineer - Senior at San Jose, CA

Infobahn Softworld Inc.Company Name - Infobahn Softworld Inc.

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Santa Clara, California, USA

Contract, Third Party

TOP 3 SKILLS: Good understanding of SystemVerilog, analyzing existing designs and making modifications, able to understand tools used by ASIC engineers like Lint, CDC, STA, etc. - scripting is nice to have KEY RESPONSIBILITIES: Write micro-architecture documentation and own major portions of the design and implementation of blocks to meet functional, timing, area, and power requirements. Collaborate with architecture and hardware teams to understand the requirements. Work with verification and p

ASIC EngineerJob Title - ASIC Engineer

AdientOne LLCCompany Name - AdientOne LLC

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California, USA

Contract

Role: ASIC Engineer Location: Clara CA 95054 OR Longmont CO 80503 Duration: 12+months Job Description: Responsible for the development of complex multi-mode / multi-corner timing constraints that are compatible for RTL and signoff Drive the pre-route timing checks and QoR clean up to eliminate SDC issues and ensure a quality handoff for STA checks Requires a mix of SDC knowledge, EDA tool competence and Tcl based scripting capability (in both EDA environment and standalone Linux Tcl shell scrip

Memory Sub-System ASIC EngineerJob Title - Memory Sub-System ASIC Engineer

Qualcomm TechnologiesCompany Name - Qualcomm Technologies

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San Diego, California, USA

Full-time

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. The infrastructure IP Team consists of a multi-disciplinary group involved in the definition and design of Platform infrastructure HW compon

Senior Asic EngineerJob Title - Senior Asic Engineer

Aditi ConsultingCompany Name - Aditi Consulting

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California, USA

Full-time

Salary: $280k - $300k/Yr. Responsibilities: Define and architect packet processing pipelines including related lookup tables and metadata structures for high-performance networking ASICs, including ingress/egress processing, switching/bridging and routing, hash tables and memory lookups, classification, ACL, various tunneling protocols like VxLAN, GRE, IPinIP, QoS, scheduling, traffic management, and congestion control. Work closely with the CTO to translate high-level system requirements and c

FPGA/ASIC Design Engineer (Silicon Engineering)Job Title - FPGA/ASIC Design Engineer (Silicon Engineering)

SpaceXCompany Name - SpaceX

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Irvine, California, USA

Full-time

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. FPGA/ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the worl

Senior ASIC Engineer - DFXJob Title - Senior ASIC Engineer - DFX

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Santa Clara, California, USA

Full-time

We are now looking for a Senior ASIC Engineer in the area of DFX ATPG flows and methodologies. Do you like to think creatively and enjoy solving challenges that require innovation? If so, we may have an opportunity for you. In our team we define and build methodologies, Software, and flows tailored to the field of Silicon device testing, Silicon debug, and Silicon failure analysis. We owe our success to our people, some of the brightest in the world, and a company culture that fosters and encour

Senior ASIC Design Engineer (eInfochips Inc)Job Title - Senior ASIC Design Engineer (eInfochips Inc)

Arrow Electronics, Inc.Company Name - Arrow Electronics, Inc.

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San Jose, California, USA

Full-time

Position: Senior ASIC Design Engineer (eInfochips Inc) Job Description: What candidate will Be Doing: Map multi-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds, and testbenches to simulate FPGA components.Establish prototyping systems in the lab and contribute to defining, evolving, and supporting our prototyping methodology.Option to engage in block-level RTL design or block or top-level IP integration.Collaborate with Software, Design, and Verific

ASIC Timing and Methodology EngineerJob Title - ASIC Timing and Methodology Engineer

Qualcomm TechnologiesCompany Name - Qualcomm Technologies

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San Diego, California, USA

Full-time

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: As a Timing Engineer, you will play a vital role in Timing analysis targeting the Mobile, Compute, Automotive and IOT markets The candidate will work with best-in-class methodologies, tools and technology to design innovative SOC products at the block/IP-level and at system-level in 5nm, 4nm and beyond (process technologies).You will be working with physical design team (a

Front-End ASIC Design EngineerJob Title - Front-End ASIC Design Engineer

DBSI ServicesCompany Name - DBSI Services

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Milpitas, California, USA

Full-time

Benefits: 401(k) 401(k) matching Relocation bonus Job Title: Front-End ASIC Design Engineer Job Description: Milpitas, CA Description: Responsibilities Include but are not Limited to: Ensure designs meet product Performance-Power-Area-Schedule requirements. Tasks may include Architecture / micro-Architecture; Logic Design; RTL integration and coding; Lint/CDC/DFT checks; Synthesis & supporting timing-closure; Contribute to and support Verification; Supporting Firmware and FPGA teams; Silicon

Low Power ASIC Engineer - New College Grad 2025Job Title - Low Power ASIC Engineer - New College Grad 2025

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Santa Clara, California, USA

Full-time

Today, NVIDIA is tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent. As an NVIDIAN, you'll be immersed in a diverse, encouraging environment where everyone is inspired to do their best work. Come join the team and see how we can make a lasting impact on the world