game design Jobs in raleigh, nc

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Design Verification EngineerJob Title - Design Verification Engineer

Yoh - A Day & Zimmerman CompanyCompany Name - Yoh - A Day & Zimmerman Company

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Remote or Santa Clara, California, USA

Full-time

Design Verification Engineer Scope: Design and development of the IO subsystems for a high-performance SoC from scratch, working closely with the Architecture and RTL teams. Develop detailed block-level design specifications and plans for a high-performance IO Subsystem. Create and implement reusable block-level components in SV, UVM, and C++, including microarchitectural models, monitors, and checkers. Develop and optimize the IO subsystem design to ensure functionality and performance are in a

Firmware (FPGA Design) Engineer SrJob Title - Firmware (FPGA Design) Engineer Sr

Lockheed Martin CorporationCompany Name - Lockheed Martin Corporation

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Remote or Owego, New York, USA

Full-time

Job Description WHAT WE'RE DOING At Lockheed Martin, we are passionate about innovation and integrity. We believe that by applying the highest standards of business ethics and forward-thinking, everything is within our capacity - and yours as a Lockheed Martin employee. Lockheed Martin values your skills, training, education and background! Do you want to be part of an environment that encourages and supports employees to think big, perform with quality and build incredible products? We provid

RF DSP FPGA Design Engineer ExpertJob Title - RF DSP FPGA Design Engineer Expert

Lockheed Martin CorporationCompany Name - Lockheed Martin Corporation

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Remote or Orlando, Florida, USA

Full-time

Job Description You will be a highly skilled and experienced FPGA Design and Test Engineer at Lockheed Martin Missiles and Fire Control (MFC). This is an excellent opportunity to work on cutting-edge technology and collaborate with a team of engineers to integrate the algorithms into a large-scale FPGA design. What You Will Be Doing As a FPGA Design and Test Engineer, you will be responsible for developing Simulink and HDL Coder models to implement RF DSP algorithms targeting a Xilinx Versal d