Design Verification Engineer Jobs in San Jose, CA

1 - 20 of 5,835 Jobs

Design Verification EngineerJob Title - Design Verification Engineer

Amick BrownCompany Name - Amick Brown

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Sunnyvale, California, USA

Contract

Amick Brown is seeking an experienced Design Verification Engineer for our direct client. Location: Sunnyvale, CA Duration: 6 Months Estimated pay range: $100 130 per client contract and candidate skills, experience and work location. Job Description Roles & Responsibilities: Responsibilities includes starting from testplanning to closing verification using coverage metrics.Involves testbench development from scratch or modification to existing testbench infrastructure for verifying new features

Design Verification EngineerJob Title - Design Verification Engineer

Apple, Inc.Company Name - Apple, Inc.

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Sunnyvale, California, USA

Full-time

Summary Do you have a passion for invention and self-challenge? Do you thrive on pushing the limits of what's considered feasible? As part of our team, you will be responsible for and contribute to verifying high-throughput, complex cellular baseband modems and transceiver link controllers: You will be crafting highly reusable premier UVM test benches, implementing coverage driven and directed test cases working with cross functional teams, deploying new tools and methodologies to improve quali

Design Verification EngineerJob Title - Design Verification Engineer

National Computer SystemsCompany Name - National Computer Systems

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Campbell, California, USA

Contract

Role: Design Verification Engineer Work Location: Santa Clara, CA Contract to Hire role Preferred Qualifications: 7+ years of experience in pre-silicon design verification Proficiency in C-shell scripting, Verilog-HDL & System Verilog. Strong knowledge in SV Assertions, UVM/OVM and functional code coverage. SOC Verification experience using ARM Cortex Microcontroller is required. Experience with advanced peripheral bus Verification IP s such as GPIO, UART, SPI, SW, JTAG, and I2C. Proficient with

Staff Design Verification EngineerJob Title - Staff Design Verification Engineer

Micron Technology, Inc.Company Name - Micron Technology, Inc.

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San Jose, California, USA

Full-time

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 45 years, Micron Technology, Inc. has redefined innovation with the world's most advanced memory and semiconductor technologies. We're an international team of visionaries and scient

Principal Design Verification EngineerJob Title - Principal Design Verification Engineer

Microsoft CorporationCompany Name - Microsoft Corporation

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Mountain View, California, USA

Full-time

The Artificial Intelligence Silicon Engineering team is seeking passionate, driven, and intellectually curious computer/electrical engineers to deliver premium-quality designs once considered impossible. We are responsible for delivering cutting-edge AI designs that can perform complex and high-performance functions in an extremely efficient manner. We are looking for a Principal Design Verification Engineer to work in the dynamic Microsoft Artificial Intelligence System on Chip (AISoC) Silicon

Design Verification Engineer At San Jose, CAJob Title - Design Verification Engineer At San Jose, CA

ProIT Inc.Company Name - ProIT Inc.

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San Jose, California, USA

Full-time, Contract, Third Party

Job Title: Design Verification Engineer Locations: San Jose, CA Type of hire: Fulltime/Contract Job Description: Education Requirements BS/MS in EE/CE, plus 7+ years of Design Verification experience Familiarity with ASIC, Computer and Embedded Systems Architectures Excellent oral and written communication skills with people at all levels, a must. Team player, with excellent debugging skills Mandatory Experience Writing and maintaining test plans Creating and maintaining UVM testbenches Creat

Design Verification EngineerJob Title - Design Verification Engineer

Mirafra IncCompany Name - Mirafra Inc

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San Jose, California, USA

Full-time

Role: Design Verification Engineer Location: San Jose CA Job Description: Architect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA Develop test plans and coverage metrics from specifications and write block and chip-level tests in C,SV,UVM Debug RTL and Gate simulations and work with design engineers to verify fixes. Write diagnostics for validation of FPGA p

Design Verification EngineerJob Title - Design Verification Engineer

LTIMindtreeCompany Name - LTIMindtree

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Mountain View, California, USA

Full-time

About Us LTIMindtree is a global technology consulting and digital solutions company that enables enterprises across industries to reimagine business models, accelerate innovation, and maximize growth by harnessing digital technologies. As a digital transformation partner to more than 700+ clients, LTIMindtree brings extensive domain and technology expertise to help drive superior competitive differentiation, customer experiences, and business outcomes in a converging world. Powered by nearly 90

Design Verification Engineer job opportunity at Folsom, CAJob Title - Design Verification Engineer job opportunity at Folsom, CA

Infobahn Softworld Inc.Company Name - Infobahn Softworld Inc.

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Santa Clara, California, USA

Contract

Role Title: Design Verification Engineer Location: Folsom, CA Duration: 12+ months contract THE ROLE: We are looking for an adaptive, self-motivative design verification engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve Client's abilities to deliver the highest quality, industry-leading technologies to market. The Verification Engineering team furthers and encourages continuous technical innovation to showcase successes as well a

Principal Design Verification Engineer - IO SubsystemJob Title - Principal Design Verification Engineer - IO Subsystem

SambaNova SystemsCompany Name - SambaNova Systems

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Palo Alto, California, USA

Full-time

Working at SambaNova This role presents a unique opportunity to shape the future of AI and the value it can unlock across every aspect of an organization s business and operations. We are looking for talented and motivated engineers to help us solve some of the most challenging problems in machine learning, artificial intelligence, and data analytics. As a Principal Design Verification Engineer - IO Subsystem , you'll be responsible for verifying the design, architecture, and micro-architecture

Principal Design Verification EngineerJob Title - Principal Design Verification Engineer

Microsoft CorporationCompany Name - Microsoft Corporation

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Mountain View, California, USA

Full-time

Microsoft is a highly innovative company that collaborates across disciplines to produce cutting edge technology that changes our world. Microsoft's Silicon team builds custom silicon for a diverse set of systems ranging from innovative consumer products like Xbox to high-performance Azure cloud servers, clients, and augmented reality. We are looking for a Principal Design Verification Engineer to work on leading edge IP (intellectual property) development as part of the Semi-custom and Central

Senior Design Verification EngineerJob Title - Senior Design Verification Engineer

Microsoft CorporationCompany Name - Microsoft Corporation

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Mountain View, California, USA

Full-time

Microsoft is a highly innovative company that collaborates across disciplines to produce cutting-edge technology that changes our world. Microsoft's Silicon team builds custom silicon for a diverse set of systems ranging from innovative consumer products like Xbox to high-performance Azure cloud servers, clients, and augmented reality. We are looking for a Senior Design Verification Engineer to work on leading-edge Intellectual Property (IP) development as part of the Semi-Custom and Central Int

GPU Design Verification Engineer, StaffJob Title - GPU Design Verification Engineer, Staff

Qualcomm TechnologiesCompany Name - Qualcomm Technologies

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Santa Clara, California, USA

Full-time

Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group > GPU ASICS Engineering General Summary: Architects, designs, implements, verifies, and optimizes performance and power of GPU cores. Responsible for verification of Graphics IP , and performing pre- and post-silicon verification to verify correctness and ensure performance and power goals are met. The responsibilities of this role include: Owning and executing on key independent tasks towards program requireme

Design Verification Engineer (GPU)Job Title - Design Verification Engineer (GPU)

Xoriant CorporationCompany Name - Xoriant Corporation

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San Jose, California, USA

Contract

Design Verification Engineer (GPU) - Local to market in San Jose - Hybrid onsite 3 days per week Role and Responsibilities: Work with architects and designers to build verification environments and test plansAnalyze failing tests to root cause along, working with RTL and reference modeling teamsProvide input on Architectural and Micro-Architectural specifications for testability and accuracyExamine code coverage results, identifying exclusions and improving stimulusMinimum requirements: - Know

ASIC Design Verification Engineer (Santa Clara, CA)Job Title - ASIC Design Verification Engineer (Santa Clara, CA)

Qualcomm TechnologiesCompany Name - Qualcomm Technologies

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Santa Clara, California, USA

Full-time

Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group > ASICS Engineering General Summary: Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This i

ASIC Engineer, Design VerificationJob Title - ASIC Engineer, Design Verification

Meta Platforms, Inc. (f/k/a Facebook, Inc.)Company Name - Meta Platforms, Inc. (f/k/a Facebook, Inc.)

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Sunnyvale, California, USA

Full-time

Meta Platforms, Inc. (f/k/a Facebook, Inc.) has the following position in Sunnyvale, CA: ASIC Engineer, Design Verification: Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification. (ref. code REQ-2405-137726: $208,936/year - $234,520/year). Individual pay is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base salary only, and do not include bonus or eq

Senior ASIC / FPGA Design Verification EngineerJob Title - Senior ASIC / FPGA Design Verification Engineer

Technical LinkCompany Name - Technical Link

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Remote

Contract

6 Months Fully remote Verification RESPONSIBILITIES The senior verifier will be called upon to: develop SystemVerilog (or VHDL) test benches for the verification of ASICs or FPGAs;apply the various techniques and approaches of the Universal Verification Methodology (UVM);contribute to the development of the test infrastructure;document and report problems found to designers and assist them in identifying the source of the problems;support laboratory testing.QUALIFICATIONS Experience in writing

RTL ASIC Design EngineerJob Title - RTL ASIC Design Engineer

Innova Solutions, IncCompany Name - Innova Solutions, Inc

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Mountain View, California, USA

Full-time

Innova Solutions is immediately hiring a RTL ASIC Design Engineer Position type: Full Time. Duration: Full Time Location: Mountain View , CA (Onsite) As a RTL ASIC Design Engineer, you will: Minimum Qualifications: looking for RTL ASIC Design engineer with some storage backgroundLogic design /micro-architecture / RTL coding is a must.Expertise in Verilog & System Verilog is a must.Experience in Synthesis / Understanding of timing concepts for ASIC is required.Experience in design of DDR / USB /S

Associate Systems Verification EngineerJob Title - Associate Systems Verification Engineer

Johnson & JohnsonCompany Name - Johnson & Johnson

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Santa Clara, California, USA

Full-time

Description Johnson & Johnson is currently seeking an Associate Systems Verification Engineer in Santa Clara, CA. At Johnson & Johnson, we believe health is everything. Our strength in healthcare innovation empowers us to build a world where complex diseases are prevented, treated, and cured, where treatments are smarter and less invasive, and solutions are personal. Through our expertise in Innovative Medicine and MedTech, we are uniquely positioned to innovate across the full spectrum of heal