ASIC Verification Engineer Jobs

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ASIC Microarchitect Engineer

APN Software Services, Inc

Irvine, California, USA

Full-time

Please contact Abdul on "" OR email me at "" Job Summary: As an ASIC Microarchitect, you will play a key role in designing and implementing state-of-the-art digital systems, SoCs, and high-performance RISC-V cores. You will collaborate closely with systems, software, and hardware design teams, as well as the physical implementation team, to architect microarchitectures that optimize power, performance, and area (PPA). We are looking for an innovative thinker who balances pragmatic engineering so

Sr ASIC/FPGA VHDL Design Engineer Secret Clearance Required No Sponsorship Available

ZoeTech Staffing LLC

Camden, New Jersey, USA

Full-time

Schedule: 9/80 Regular with every other Friday off Job Description: Reporting to the Manager, Engineering (ASIC/FPGA), the Senior Member of Engineering Staff (SMES) will be part of the key ASIC/FPGA design team, responsible for the delivery of FPGA/ASICs for high-speed crypto applications. S/he will architect, implement high speed crypto architectures, on ASICs/Xilinx Zynq/MPSOC class FPGAs, with hands on design/debug with Ethernet, TCP/IP protocols. The company has state-of-the-art EDA flows/

Lead RFIC ASIC Design Engineer

Everest Consultants, Inc

Hillsboro, Oregon, USA

Full-time

Title: Lead RFIC ASIC Design Engineer Duration: Permanent, Full-time Location: Hillsboro, OR (Hybrid: onsite 3 days per week) Salary Range: $160,000 to $225,000 per year **Candidates must have valid U.S. work authorization at the time of hire. Our client, a leader in the test-and-measurement and wireless communications industries, is seeking passionate individuals with a vision for the future, a desire to impact the world, and a drive to bring innovative ideas to life. They are building develop

Senior ASIC Power Integrity Engineer

NVIDIA Corporation

Westford, Massachusetts, USA

Full-time

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a "learning machine" that constantly evolves by adapting to new opportunities which are hard to solve, that only we can pursue, and that matter to the world. This is our life's work, to amplify huma

Senior ASIC Front End Infrastructure Engineer

NVIDIA Corporation

Remote or Santa Clara, California, USA

Full-time

NVIDIA is seeking elite ASIC RTL/Verification ASIC engineers to develop the core Verification and RTL infrastructure of the world's leading GPUs. This position offers the opportunity to have a real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to artificial intelligence to self-driving cars and supercomputers. Our team of dedicated Infrastructure engineers continuously upgrades the NVIDIA Hardware design environment. We focus relentlessly

Senior ASIC Power Engineer

NVIDIA Corporation

Santa Clara, California, USA

Full-time

We are now looking for a Senior ASIC Power Engineer! NVIDIA is seeking extraordinary power engineers to design hardware accelerators and processors on our next-generation mobile, embedded and datacenter platforms. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. What you'll be doing: Develop innovative HW, GPU and system

Senior ASIC Timing Engineer

NVIDIA Corporation

Westford, Massachusetts, USA

Full-time

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a "learning machine" that constantly evolves by adapting to new opportunities which are hard to solve, that only we can pursue, and that matter to the world. This is our life's work, to amplify huma

Technical Program Manager (TPM) ASIC / SoC

DivTek Global Solutions Inc.

San Jose, California, USA

Full-time

Job Title: Technical Program Manager (TPM) ASIC / SoC Hybrid San Jose, CA Job Location: San Jose, CA (Hybrid) Benefits: Excellent PTO, full benefits, 401(k), hybrid schedule, great team culture Job Type: Full-Time, Permanent About Company: This is a full-time role, directly employed position through the client. Work Schedule Type: This is a hybrid position Relocation: Relocation assistance available Position Overview Technical Program Manager (TPM): We are seeking a hands-on Technical Program

ASIC & FPGA Design Engineering

Judge Group, Inc.

Orlando, Florida, USA

Full-time

Location: Orlando, FL Description: Role - Asic & Fpga Design Engineering Type: Contract Location - ( Onsite) Job Description: Develops, designs, verifies, and documents Application-Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays (FPGA) development. Determines architecture design, logic design, and system simulation. Assignments include the analysis of all aspects from high-level design to synthesis, place and route, and timing and power utilization. Typically uses spe

Senior Director, ASIC, Silicon & Systems Technologies

Juniper Networks

Sunnyvale, California, USA

Full-time

At Juniper, we believe the network is the single greatest vehicle for knowledge, understanding, and human advancement the world has ever known. To achieve real outcomes, we know that experience is the most important requirement for networking teams and the people they serve. Delivering an experience-first, AI-Native Network pivots on the creativity and commitment of our people. It requires a consistent and committed practice, something we call the Juniper Way. Job Summary Juniper Networks is

Sr Director, ASIC Engineering

PaloAlto Networks

Santa Clara, California, USA

Full-time

Company Description Our Mission At Palo Alto Networks everything starts and ends with our mission: Being the cybersecurity partner of choice, protecting our digital way of life. Our vision is a world where each day is safer and more secure than the one before. We are a company built on the foundation of challenging and disrupting the way things are done, and we're looking for innovators who are as committed to shaping the future of cybersecurity as we are. Who We Are We take our mission of

ASIC Package Engineering Intern/Co-Op (PhD | Fall 2025 | Hybrid)

AMD (Advanced Micro Devices)

Remote or Austin, Texas, USA

Full-time

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellen

ASIC Engineering Technical Leader

Cisco Systems, Inc.

San Jose, California, USA

Full-time

The application window is expected to close on: July 28th, 2025. Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. Meet the Team The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world.

ASIC Engineering Technical Leader - SDC

Cisco Systems, Inc.

San Jose, California, USA

Full-time

The application window is expected to close on: July 31, 2025. Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. This role requires being onsite in San Jose, CA 4+ days/week. Meet the Team Join the Cisco Silicon One team in developing a unified silicon architecture for web scale and service provider networks. Cisco's silicon team provides a unique experience for ASIC engineers by combining the resources offered by a large multi-

Associate ASIC/FPGA Engineering Manager

Lockheed Martin Corporation

Remote or San Diego, California, USA

Full-time

Job Description Join Our Team as an Associate ASIC/FPGA Engineering Manager where you will support over 50 different programs and research and development (R&D) efforts, affecting technology across military space, civil space, commercial space, missiles, missile defense platforms, satellite surveillance platforms, deep space exploration, and manned flight missions. Location: Although this position does support some teleworking; the selected candidate will need to be located near our Lockheed Ma

ASIC Engineering Technical Leader (Design)

Cisco Systems, Inc.

San Jose, California, USA

Full-time

The application window is expected to close on 7/30/25. This role will be based onsite out of our San Jose, CA office. The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world. Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon architecture

ASIC Design Leader

Kratos Defense and Security Solutions, Inc.

Crane, Indiana, USA

Full-time

Job Description Permanent Residents and Visa-holders are not eligible for employment. General Summary This full-time position is in the Systems Development Department of Kratos SRE and is a highly motivated and self-driven role that will focus on leading development efforts for next-generation technologies for microelectronics Key Responsibilities Provide technical leadership in the development and evaluation of custom integrated circuit designs for defense applications,Investigate, research

Senior Manager / ASIC STA & CAD Engineering

Coretek Labs

Longmont, Colorado, USA

Contract, Third Party

Job Title: ASIC STA & CAD Engineering Location: Longmont, Colorado (Hybrid) Duration: Long Term Contract Domain: Engineering Key Responsibilities: Developing block and SoC timing constraints, full chip STA setup and signoff of multi-corner multi-voltage designs. Owning timing flow and execution to meet SoC timing requirements including timing budgeting, repeater planning, constraints/exceptions generation and management Engaging closely with block and SoC design teams to understand the design