Principal ASIC Designer Jobs in 95051

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Senior Principal ASIC Design Engineer (Hybrid)

BAE Systems

San Jose, California, USA

Full-time

Job Description You don't see it, but it's there. Our employees work on the world's most advanced electronics - from saving emissions in the City of Lights to powering the Mars Rover to protecting the F-35 fighter jet. At Electronic Systems, you'll be among the brightest minds, working on the aerospace and defense industry's most difficult problems. Drawing strength from our differences, we're innovating for the future. And you can, too. Our flexible work environment provides you a chance to ch

Principal UX Designer

Gratiture Solutions

Sunnyvale, California, USA

Full-time

Gratiture Solutions is one of the fastest growing staffing company serving clients in the US, Mexico, India, and Canada. We have an open position with the following details: Location: McLean, VA or Bay Area CA (Sunnyvale) Type : Contract Contract Duration:6-12 months Note: Candidates must submit their portfolios before interview Rate: upon candidate experience End client-Confidential Industry: Food and beverage sector Principal UX Designer will extend beyond conventional design responsibili

UX/CX Designer Principal Engineer (Speech Scientist)_IVR _Pre- Sales _ no third party employer

PropelSys Technologies LLC.

Remote

Full-time, Part-time, Contract, Third Party

UX/CX Designer Principal Engineer (Speech Scientist) Long term project Remote Direct Client Description: What you'll be doing As the UX/CX Designer Principal Engineer (PE), you will be part of Verizon's Professional Services (PS) team. The PS team implements and maintains both Verizon hosted and premise solutions which contribute to millions in Verizon revenue. The solutions are critical to our customers (Verizon's Enterprise, Medium Business, and Government) so our focus is to consult with

ASIC Physical Designers - III

Mindlance

Remote

Contract

100% Remote Job Responsibilities: Collaborate with the design team to understand and define physical design specifications for mixed signal circuits. Perform floor planning, power planning, and placement of digital and analog blocks. Physical design validation involving static timing and noise analysis. Power grid characterization and analysis using industry standard tools. Troubleshoot and resolve physical design issues and implement design changes. Work with DRC/LVS teams to ensure desig

ASIC Physical Designers - III

Infobahn Softworld Inc.

Remote or Austin, Texas, USA

Third Party, Contract

Title : ASIC Physical Designers - Location : Austin, TX, 78746 Duration : 06 Months (possibility for extension) Job Description: 100% Remote with the option to be hybrid if in Austin, TX Laptop will be issued Job Title: VLSI Circuit Design and Physical Validation Description: The hire will be involved in deep sub-micron IC logic and VLSI, ASIC and Custom Design, with Intel's PROM IP for use in mobile, IOT, client, network, and server segments. We are looking for a skilled and motivated VLSI

Physical Design Engineer with ASIC design Exp.

ApTask

San Jose, California, USA

Full-time

Position: Physical Design Engineer with ASIC design Exp. Location: San Jose, CA (Onsite) Duration: Fulltime Job Description: BS/MS in Electrical Engineering or Computer Science Minimum of hands-on experience in ASIC design and design constraints level synthesis, place and route, timing closure. Standard PnR and signoff tools and their capabilities Understanding of basic power Analysis and power integrity Analysis Excellent English verbal and written communication skills. Self-motivated, abl

Physical Design Engineer (ASIC)

ApTask

San Jose, California, USA

Full-time

Position: Physical Design Engineer Location: San Jose, CA (onsite) Duration: Fulltime Salary: $140K per annum + Benefits Job Description: BS/MS in Electrical Engineering or Computer Science6+ year minimum of hands-on experience in ASIC design and design constraints level synthesis, place and route, timing closure.Standard PnR and signoff tools and their capabilitiesUnderstanding of basic power Analysis and power integrity AnalysisExcellent English verbal and written communication skills.Self-

Verification Engineer

Happiest Minds Technologies Limited

Fremont, California, USA

Third Party, Contract

Verification Engineer Fremont, CA BSEE or BSCS, or equivalent 5+ years of ASIC/FPGA verification experience using SystemVerilog / UVMMust have experience with:Verification flow using Questa simulationDeveloping verification plansDesigning and implementing SystemVerilog / UVM test benches for constrained-random verificationDeveloping functional coverage modelsWriting and debugging directed and random test casesExperience with automation/scripting (Python, Perl, sed, awk, tcl/tk, sh)Experience wit

RTL/ASIC Design Engineer

Netwoven

San Jose, California, USA

Contract

KEY RESPONSIBILITIES: Microarchitecture development of IP subsystems Perform RTL design of digital components. Work with functional verification team to meet coverage and quality standards. Analyze/fix Lint and CDC errors of the components. Guarantee quality/timely deliverables meeting project s schedule. Help to improve/automate design process. Support post-silicon product bring-up/debug. PREFERRED EXPERIENCE: 10 years' experience in RTL coding Knowledge of PCIe Gen5 and PIPE specification Kno

Technical Business Development Manager with ASIC, Foundry and designing knowledge

Epikso

San Jose, California, USA

Full-time

Sr. BDM role San Jose CA. Hybrid role Direct Hire permanent opportunity Salary Range: $170K-$240K as base salary + bonus + benefits Developing company.link's business to provide access to advanced ASIC foundry technologies to Small and Medium Businesses (SMBs) and to larger companies in North America. What you will do The IC-link division of the company is responsible for providing access to advanced ASIC foundry technologies to Small and Medium Businesses (SMBs) and to larger companies for

ASIC Engineer - III

CloudZenix, LLC

Santa Clara, California, USA

Contract

Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 10+ years of Hardware Engineering or related work experience. Job responsibilities include Ownership of DV test bench and other associated collaterals (Checkers, Trackers, Scoreboards, Assertion, Functional Coverage) Develop test plan and test cases to cover design feature set, follow up with stake holders on code coverage, functional coverage closure at different

Sr. Machine Learning Engineer

Object Technology Solutions, Inc.

San Jose, California, USA

Contract

Must have a BS or Master s degree or PhD in Electrical and/or Computer Engineering or Computer ScienceAt least 5 years of relevant work experience.Strong understanding of dimensionality reduction techniques, clustering, and classification.Familiarity with supervised and unsupervised machine learning metrics and requirements.Excellent writing, documentation, and communication skills.Ability to learn new skills and take on new responsibilities.Experience working with AI Accelerators and Performanc

RTL Design Engineer

SGS Consulting

Santa Clara, California, USA

Contract

THE DUTIES: The work will expose the designer to a number of IP including ARM cores, Ethernet, DDR, DMA, PCIE, SATA and client s internal IPs.Successful candidates will be responsible for leading, and participating in, the design of leading edge SoCs in advanced digital CMOS processes.Our RTL Design Engineers are expected contribute in all aspects of SoC design including: Chip definition, Architecture development and modeling, Development of micro-architectural specifications, Conversion of micr

100% Remote- Memory Controller Systems Architect @ San Jose, CA

Kutir Inc

San Jose, California, USA

Contract, Third Party

Hi, Please check the job description as below and let me know you if you would be interested and available. Please let me know your available time for a quick call Memory Controller Systems Architect San Jose, CA 6+ Months Responsibilities include, but not limited to: Modeling and analysis of system cache, memory controller scheduling algorithms, and features Develop tests, testplans and testing infrastructure for new architecture/features Developing, evaluating and optimizing new memory/st

100% Remote- System Engineer - Mobile SoC @ San Jose, CA

Kutir Inc

San Jose, California, USA

Contract, Third Party

Hi, Please check the job description as below and let me know you if you would be interested and available. Please let me know your available time for a quick call System Engineer - Mobile SoC San Jose, CA 6+ Months You will be part of a team working on next-gen Memory and storage solutions, establishing the competitive advantage of the Micron parts or identifying the areas of improvement to stay ahead of the competition, you will contribute to the development of new architectures and products

ASIC Design Engineer

BlackFern Recruitment

Milpitas, California, USA

Full-time

Job Description Front-End ASIC Design Engineer - Milpitas, CA Our client develops and delivers ASIC and SoC solutions to customers worldwide in some of the hottest technology areas. The Front-End ASIC Design Engineer will be a key person in this growing design department. Micro-architecture experience is required. Great opportunity to work on current, ongoing and upcoming new projects. Hybrid remote/onsite position. Primary responsibilities include: Support customer s design through all phases o

RTL Design Engineer - Hybrid

VIVA USA INC

Santa Clara, California, USA

Contract

Title: RTL Design Engineer - Hybrid Description: Looking for RTL design integration Engineer. JOB DUTIES: Responsible for RTL design using Verilog HDL for implementation and debug. Read and comprehend System on Chip level architectural specification. Write microarchitecture specification for new and modified functions. Responsible for linting and simulation of design. Work with synthesis and backend teams for physical implementation. EDUCATION: Bachelor's or Master's in Computer Engineering KE

Wireless SoC Low Power Design Engineer

Apple, Inc.

Sunnyvale, California, USA

Full-time

Summary Come join Apple's growing wireless silicon development team. Our wireless SOC organization is responsible for all aspects of wireless silicon development. With a particular emphasis on highly energy-efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture, and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration,

Wireless SoC Low Power Design Engineer

Apple, Inc.

Sunnyvale, California, USA

Full-time

Summary Come join Apple's growing wireless silicon development team. Our wireless SOC organization is responsible for all aspects of wireless silicon development. With a particular emphasis on highly energy-efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture, and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration,

Wireless SoC Low Power Design Engineer

Apple, Inc.

Sunnyvale, California, USA

Full-time

Summary Come join Apple's growing wireless silicon development team. Our wireless SOC organization is responsible for all aspects of wireless silicon development. With a particular emphasis on highly energy-efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture, and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration,