RFIC - PLL Design Engineer Jobs in San Jose, CA

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RFIC - PLL Design Engineer

Apple, Inc.

•

Sunnyvale, California, USA

Full-time

Summary Would you like to join Apple's growing wireless silicon development team? The wireless RFIC team architects, designs, and validates radio transceivers integrated into complex wireless SoCs. Our wireless organization is responsible for all aspects of wireless silicon development that transform the user experience at the product level, all of which is driven by a best-in-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture a
Posted 51 days ago | Updated 7 hours ago

Sr. RFIC - PLL Design Engineer

Apple, Inc.

•

Sunnyvale, California, USA

Full-time

Summary Would you like to join Apple's growing wireless silicon development team? The wireless RFIC team architects, designs, and validates radio transceivers integrated into complex wireless SoCs. Our wireless organization is responsible for all aspects of wireless silicon development that transform the user experience at the product level, all of which is driven by a best-in-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture a
Posted 51 days ago | Updated 7 hours ago

Senior RFIC Design Engineer

Apple, Inc.

•

Sunnyvale, California, USA

Full-time

Summary Would you like to join Apple's growing wireless silicon development team? The wireless RFIC team architects, designs, and validates radio transceivers integrated into complex wireless SoCs. Our wireless organization is responsible for all aspects of wireless silicon development that transform the user experience at the product level, all of which is driven by a best-in-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture a
Posted 18 days ago | Updated 7 hours ago

RFIC Design Validation Test Engineer

Apple, Inc.

•

Sunnyvale, California, USA

Full-time

Summary The Wireless SoC Radio Team designs state-of-art highly energy efficient CMOS radios, from RF to bits. To deliver these radios, our team is responsible for the design and validation of a wide range of RF, analog, and mixed-signal blocks from RF front-end amplifiers to data converters, including baseband filters, baseband and RF phase-locked loops, crystal oscillators, and bandgap references. We are working on new technologies that transform the user experience at the product level, all
Posted 17 days ago | Updated 7 hours ago

Senior RFIC Design Validation Test Engineer

Apple, Inc.

•

Sunnyvale, California, USA

Full-time

Summary The Wireless SoC Radio Team designs state-of-art highly energy efficient CMOS radios, from RF to bits. To deliver these radios, our team is responsible for the design and validation of a wide range of RF, analog, and mixed-signal blocks from RF front-end amplifiers to data converters, including baseband filters, baseband and RF phase-locked loops, crystal oscillators, and bandgap references. We are working on new technologies that transform the user experience at the product level, all
Posted 17 days ago | Updated 7 hours ago

RFIC Design Validation Test Engineer

Apple, Inc.

•

Sunnyvale, California, USA

Full-time

Summary The Wireless SoC Radio Team designs state-of-art highly energy efficient CMOS radios, from RF to bits. To deliver these radios, our team is responsible for the design and validation of a wide range of RF, analog, and mixed-signal blocks from RF front-end amplifiers to data converters, including baseband filters, baseband and RF phase-locked loops, crystal oscillators, and bandgap references. We are working on new technologies that transform the user experience at the product level, all
Posted 17 days ago | Updated 7 hours ago

RFIC Design Engineer

Apple, Inc.

•

Sunnyvale, California, USA

Full-time

Summary The Wireless SoC Radio Team designs state-of-art highly energy efficient CMOS radios, from RF to bits. To deliver these radios, our team is responsible for the design of a wide range of RF, analog, and mixed-signal blocks from RF front-end amplifiers to data converters, including baseband filters, baseband and RF phase-locked loops, crystal oscillators, and bandgap references. We are working on new technologies that transform the user experience at the product level, all of which is dri
Posted 51 days ago | Updated 7 hours ago

RFIC Design Engineer

Apple, Inc.

•

Sunnyvale, California, USA

Full-time

Summary Would you like to join Apple's growing wireless silicon development team? The wireless RFIC team architects, designs, and validates radio transceivers integrated into complex wireless SoCs. Our wireless organization is responsible for all aspects of wireless silicon development that transform the user experience at the product level, all of which is driven by a best-in-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture a
Posted 51 days ago | Updated 7 hours ago

Sr. RFIC Design Engineer

Apple, Inc.

•

Sunnyvale, California, USA

Full-time

Summary The Wireless SoC Radio Team designs state-of-art highly energy efficient CMOS radios, from RF to bits. To deliver these radios, our team is responsible for the design of a wide range of RF, analog, and mixed-signal blocks from RF front-end amplifiers to data converters, including baseband filters, baseband and RF phase-locked loops, crystal oscillators, and bandgap references. We are working on new technologies that transform the user experience at the product level, all of which is dri
Posted 58 days ago | Updated 7 hours ago

RFIC Layout Engineer

Apple, Inc.

•

Sunnyvale, California, USA

Full-time

Summary The Wireless SoC Radio Team designs state-of-art highly energy efficient CMOS radios, from RF to bits. To deliver these radios, our team is responsible for the design of a wide range of RF, analog, and mixed-signal blocks from RF front-end amplifiers to data converters, including baseband filters, baseband and RF phase-locked loops, crystal oscillators, and bandgap references. We are working on new technologies that transform the user experience at the product level, all of which is dri
Posted 15 days ago | Updated 7 hours ago

RFIC Test Engineer

Apple, Inc.

•

Sunnyvale, California, USA

Full-time

Summary The wireless RFIC team architects, designs, and validates radio transceivers integrated into complex wireless SoCs. Our transceivers have powered wireless connectivity solutions for Apple wearable products, enabling the smallest form factor at the lowest power envelope. You will have the opportunity to do innovative development in transceiver design while working closely with systems and product teams at Apple.In this role, you will be part of an RFIC design team and perform test, debug
Posted 58 days ago | Updated 7 hours ago

Sr. RFIC Test Engineer

Apple, Inc.

•

Sunnyvale, California, USA

Full-time

Summary The wireless RFIC team architects, designs, and validates radio transceivers integrated into complex wireless SoCs. Our transceivers have powered wireless connectivity solutions for Apple wearable products, enabling the smallest form factor at the lowest power envelope. You will have the opportunity to do innovative development in transceiver design while working closely with systems and product teams at Apple.In this role, you will be part of an RFIC design team and perform test, debug
Posted 58 days ago | Updated 7 hours ago

Sr. RFIC Layout Engineer

Apple, Inc.

•

Sunnyvale, California, USA

Full-time

Summary The Wireless SoC Radio Team designs state-of-art highly energy efficient CMOS radios, from RF to bits. To deliver these radios, our team is responsible for the design of a wide range of RF, analog, and mixed-signal blocks from RF front-end amplifiers to data converters, including baseband filters, baseband and RF phase-locked loops, crystal oscillators, and bandgap references. We are working on new technologies that transform the user experience at the product level, all of which is dri
Posted 58 days ago | Updated 7 hours ago

Design Verification Engineer

Amick Brown

•

Sunnyvale, California, USA

Contract

Amick Brown is seeking an experienced Design Verification Engineer for our direct client. Location: Sunnyvale, CA Duration: 6 Months Estimated pay range: $100 130 per client contract and candidate skills, experience and work location. Job Description Roles & Responsibilities: Responsibilities includes starting from testplanning to closing verification using coverage metrics.Involves testbench development from scratch or modification to existing testbench infrastructure for verifying new features
Posted 3 days ago

Senior Mask Layout Engineer

Technical Link

•

San Jose, California, USA

Contract

Location: San Jose, CA (Must be on-site) LOA: 6-12 months Skills: Analog Layout 7nm/5nm FInFET, TSMC, RF, High Speed, PLL, Serdes Location: San Jose, CA Analog and Mixed-Signal Layout Engineer Job Description The candidate should be able work independently on block level and IP level Analog layout design, coordinating with the circuit designer and the rest of the layout team. The candidate will need to be able to work with both design engineers and mask design engineers in remote locations, and
Easy Apply
Posted 60+ days ago | Updated 2 days ago

Physical Design STA Engineer

Xoriant Corporation

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San Jose, California, USA

Contract

Hi, This is Himanshu from Xoriant, sharing the below job description for one of our open requirements, please have a look and let me know your valuable feedback along with your updated resume and best time to reach you. Job Position: Physical Design STA Engineer Job Location: San Jose, CA (Hybrid) Job Duration: 6+ Months Contract Job Description: Sr. STA Engineer with15+ years experience for STA position (Physical Design Static Timing Analysis / STA Engineer).Perform static timing analysis (ST
Easy Apply
Posted 32 days ago | Updated 5 days ago

Hardware Design Engineer 5

WinMax Systems Corporation

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Mountain View, California, USA

Contract

Title: Hardware Design Engineer 5Location: Mountain View, CA (onsite)Contract: 6+ Month Job Description: Candidate Requirements - 10+ overall years of experience in the design verification - Hands-on experience with UVM, Testbench Test case coding - Working experience with System Verilog and C languages - AXI and PCIE protocol experience is plus - Good Communication skills and team player Degrees or certifications required: Bachelors degree in computer science or electrical engineering or relat
Easy Apply
Posted 60+ days ago | Updated 3 days ago

ASIC Engineer, Design Verification

Meta Platforms, Inc. (f/k/a Facebook, Inc.)

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Sunnyvale, California, USA

Full-time

Meta Platforms, Inc. (f/k/a Facebook, Inc.) has the following position in Sunnyvale, CA: ASIC Engineer, Design Verification: Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification. (ref. code REQ-2405-137726: $208,936/year - $234,520/year). Individual pay is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base salary only, and do not include bonus or eq
Posted 11 days ago

Product Design Engineer

Meta Platforms, Inc. (f/k/a Facebook, Inc.)

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Sunnyvale, California, USA

Full-time

Meta Platforms, Inc. (f/k/a Facebook, Inc.) has the following position in Sunnyvale, CA: Product Design Engineer: Build tools that help people feel connected, anytime, anywhere. 20% travel required. (ref. code REQ-2405-136889: $171,265/year - $189,200/year). Individual pay is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base salary only, and do not include bonus or equity or sales incentives, if applicable. In addition t
Posted 17 days ago

Principal Design Verification Engineer - IO Subsystem

SambaNova Systems

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Palo Alto, California, USA

Full-time

Working at SambaNova This role presents a unique opportunity to shape the future of AI and the value it can unlock across every aspect of an organization s business and operations. We are looking for talented and motivated engineers to help us solve some of the most challenging problems in machine learning, artificial intelligence, and data analytics. As a Principal Design Verification Engineer - IO Subsystem , you'll be responsible for verifying the design, architecture, and micro-architecture
Easy Apply
Posted 12 days ago | Updated 12 days ago