asic design verification engineer Jobs in san jose, ca

1 - 20 of 1,306 Jobs

Senior Design Verification EngineerJob Title - Senior Design Verification Engineer

PeopleNTechCompany Name - PeopleNTech

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Mountain View, California, USA

Third Party, Contract

Position: Senior Design Verification Engineer Location: Mountainview, California Experience: 7 to 12 years What candidate will Be Doing: Strong expertise along-with complex SoC/IP debug is mustAt-least 5+ years of experience in System Verilog HVL and C/C++.AMBA AXI bus along-with ARM or C based processorBi-frost/Processor based C and SV/UVM mix Verification. What we are looking for: A bachelor s degree in electrical or computer engineering, accompanied by a minimum of 8 years of experience in

Design Verification EngineerJob Title - Design Verification Engineer

Mirafra IncCompany Name - Mirafra Inc

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San Jose, California, USA

Full-time

Experience: 6 to 15+ years of experience. Job Requirements are as below: Architect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA Develop test plans and coverage metrics from specifications and write block and chip-level tests in C,SV,UVM Debug RTL and Gate simulations and work with design engineers to verify fixes. Write diagnostics for validation of FPGA prot

ASIC FPGA Design and Verification Engineer - (Experienced, Lead, or Senior) - MTVJob Title - ASIC FPGA Design and Verification Engineer - (Experienced, Lead, or Senior) - MTV

Boeing CompanyCompany Name - Boeing Company

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Mountain View, California, USA

Full-time

ASIC FPGA Design and Verification Engineer - (Experienced, Lead, or Senior) - MTV Company: The Boeing Company Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC and/or FPGA Design and Verification Engineers (Experienced, Lead, or Senior) to join us as part of our Boeing Electronic Products team at the heart of Boeing's products; ASICs and FPGAs in Mountain View, CA. From complex digitally beamformed phased arrays for constellation satellite programs to c

Senior ASIC Verification Engineer - GPUJob Title - Senior ASIC Verification Engineer - GPU

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Santa Clara, California, USA

Full-time

NVIDIA is seeking elite ASIC Verification Engineers to verify the design and implementation of the world's leading SoC's and GPU's. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and

ASIC Design EngineerJob Title - ASIC Design Engineer

Yochana IT SolutionsCompany Name - Yochana IT Solutions

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Santa Clara, California, USA

Contract, Third Party

ASIC Design Engineer Location: Santa Clara, CA Onsite Contract Overview of the Role As an ASIC Design Engineer , you will play a crucial role in the development and optimization of our cutting-edge ASIC solutions. Your work will directly impact the efficiency, performance, and scalability of our products, driving forward the company's objectives and contributing to technological innovations that shape the industry. Detailed Responsibilities Run and manage Fusion Compiler, ICC II, and Innovus

ASIC Verification Engineer - New College Grad 2025Job Title - ASIC Verification Engineer - New College Grad 2025

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Santa Clara, California, USA

Full-time

NVIDIA is seeking best-in-class ASIC Verification Engineer to verify the world's leading GPUs. In this role, you will be doing unit level verification of the process scheduling and system interface hardware of the GPU. This position will be working across many NVIDIA teams from software, to architecture, design, methodology, and more. The GPU is used in applications from consumer graphics, through self-driving cars, to artificial intelligence, all of which you will be involved in and learn about

ASIC Verification Engineer - GPUJob Title - ASIC Verification Engineer - GPU

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Santa Clara, California, USA

Full-time

Senior ASIC Verification Engineer, Coherent High Speed InterconnectJob Title - Senior ASIC Verification Engineer, Coherent High Speed Interconnect

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Remote or Santa Clara, California, USA

Full-time

We are now looking for a Senior ASIC Verification Engineer for our Coherent High Speed Interconnect team! For two decades, we have pioneered visual computing, the art and science of computer graphics. With our invention of the GPU - the engine of modern visual computing - the field has grown to encompass video games, movie production, product design, medical diagnosis, and scientific research. Today, we stand at the beginning of the next era, the AI computing era, ignited by a new computing mod

Senior Software Engineer, ASIC Verification ToolsJob Title - Senior Software Engineer, ASIC Verification Tools

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Santa Clara, California, USA

Full-time

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology-and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent.

ASIC Verification Engineer - HybridJob Title - ASIC Verification Engineer - Hybrid

VIVA USA INCCompany Name - VIVA USA INC

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San Jose, California, USA

Contract

Title: ASIC Verification Engineer - Hybrid Mandatory skills: UVM, UVM design verification, UVM verification, UVM environment, AISC, SOC, AISC verification, SOC verification, DV tools, DV methodologies, CPU, I/O, Cadence, Synopsys Verification tools, Synopsys, Verdi, System Verilog, IP, I/O SOC, UVM test bench development, design verification, test plan, test verification Description: Job Duties: Participate in the functional verification of a block(s) of complex ASICs and/or IP cores for an I/O

Senior ASIC Design EngineerJob Title - Senior ASIC Design Engineer

PeopleNTechCompany Name - PeopleNTech

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San Jose, California, USA

Contract, Third Party

Position: Senior ASIC Design Engineer Location: San Jose, CA (Complete onsite) Experience: 8+ years (Relevant) What candidate will Be Doing: Map multi-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds, and testbenches to simulate FPGA components. Establish prototyping systems in the lab and contribute to defining, evolving, and supporting our prototyping methodology. Option to engage in block-level RTL design or block or top-level IP integration. Colla

ASIC Engineer, Senior Staff, Physical VerificationJob Title - ASIC Engineer, Senior Staff, Physical Verification

Juniper NetworksCompany Name - Juniper Networks

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Sunnyvale, California, USA

Full-time

At Juniper, we believe the network is the single greatest vehicle for knowledge, understanding, and human advancement the world has ever known. To achieve real outcomes, we know that experience is the most important requirement for networking teams and the people they serve. Delivering an experience-first, AI-Native Network pivots on the creativity and commitment of our people. It requires a consistent and committed practice, something we call the Juniper Way. Job Description for an ASIC Physi

Senior ASIC Design EngineerJob Title - Senior ASIC Design Engineer

PeopleNTechCompany Name - PeopleNTech

•

San Jose, California, USA

Contract, Third Party

What candidate will Be Doing: Map multi-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds, and testbenches to simulate FPGA components.Establish prototyping systems in the lab and contribute to defining, evolving, and supporting our prototyping methodology.Option to engage in block-level RTL design or block or top-level IP integration.Collaborate with Software, Design, and Verification teams to validate the functional and performance objectives of the S

ASIC/RTL Design Engineer - Senior at San Jose, CAJob Title - ASIC/RTL Design Engineer - Senior at San Jose, CA

Infobahn Softworld Inc.Company Name - Infobahn Softworld Inc.

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Santa Clara, California, USA

Contract, Third Party

TOP 3 SKILLS: Good understanding of SystemVerilog, analyzing existing designs and making modifications, able to understand tools used by ASIC engineers like Lint, CDC, STA, etc. - scripting is nice to have KEY RESPONSIBILITIES: Write micro-architecture documentation and own major portions of the design and implementation of blocks to meet functional, timing, area, and power requirements. Collaborate with architecture and hardware teams to understand the requirements. Work with verification and p

Front-End ASIC Design EngineerJob Title - Front-End ASIC Design Engineer

DBSI ServicesCompany Name - DBSI Services

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Milpitas, California, USA

Full-time

Benefits: 401(k) 401(k) matching Relocation bonus Job Title: Front-End ASIC Design Engineer Job Description: Milpitas, CA Description: Responsibilities Include but are not Limited to: Ensure designs meet product Performance-Power-Area-Schedule requirements. Tasks may include Architecture / micro-Architecture; Logic Design; RTL integration and coding; Lint/CDC/DFT checks; Synthesis & supporting timing-closure; Contribute to and support Verification; Supporting Firmware and FPGA teams; Silicon

Senior ASIC Verification and Infrastructure Engineer - GPUJob Title - Senior ASIC Verification and Infrastructure Engineer - GPU

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Santa Clara, California, USA

Full-time

NVIDIA is seeking outstanding Senior Design Verification Engineers with a specialty in tools and automation to drive efficiency and collaboration among our High Speed IO engineering teams. This position offers the opportunity to have a big impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to artificial intelligence to self-driving cars and supercomputers. Our DV infrastructure and methodology team automates, analyzes, and optimizes the verifi

SOC Verification and Methodology EngineerJob Title - SOC Verification and Methodology Engineer

Qualcomm TechnologiesCompany Name - Qualcomm Technologies

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Santa Clara, California, USA

Full-time

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. We are looking for ASIC Design Verification Engineers with strong CPU, ASIC design and verification fundamentals and drive to innovate new so

ASIC Implementation EngineerJob Title - ASIC Implementation Engineer

Broadcom CorporationCompany Name - Broadcom Corporation

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San Jose, California, USA

Full-time

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Job Description: ASIC implementation engineer with demonstrated expertise in multiple disciplines including synthesis, design for test, floorplanning, place and route, clock methodology, power planning and analysis, timing closure, signal integrity and

Senior ASIC Engineer, Static Timing AnalysisJob Title - Senior ASIC Engineer, Static Timing Analysis

Infobahn Softworld Inc.Company Name - Infobahn Softworld Inc.

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Santa Clara, California, USA

Third Party, Contract

Role Title: Senior ASIC Engineer, Static Timing Analysis Location: San Jose, CA Onsite Alternate location: Colorado office - Longmont Duration: 12+ months contract Description: Responsible for the development of complex multi-mode / multi-corner timing constraints that are compatible for RTL and signoff Drive the pre-route timing checks and QoR clean up to eliminate SDC issues and ensure a quality handoff for STA checks Requires a mix of SDC knowledge, EDA tool competence and Tcl based scrip

ASIC Verification Engineer, GPU - New College Grad 2025Job Title - ASIC Verification Engineer, GPU - New College Grad 2025

NVIDIA CorporationCompany Name - NVIDIA Corporation

•

Santa Clara, California, USA

Full-time

We're now looking for an ASIC Verification Engineer - New College Grad! NVIDIA is seeking elite ASIC Verification Engineers to verify the design and implementation of the world's leading SoC's and GPU's. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of extraordinary people stretching around the gl