ip Jobs in San Jose, CA

241 - 260 of 336 Jobs

Global Network LAN SpecialistJob Title - Global Network LAN Specialist

3M CompanyCompany Name - 3M Company

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Remote or Maplewood, Minnesota, USA

Full-time

Job Description: Global Network LAN Specialist Collaborate with Innovative 3Mers Around the World Choosing where to start and grow your career has a major impact on your professional and personal life, so it's equally important you know that the company that you choose to work at, and its leaders, will support and guide you. With a wide variety of people, global locations, technologies and products, 3M is a place where you can collaborate with other curious, creative 3Mers. This position pro

Senior Network Engineer - Data Center/Enterprise-level ExperienceJob Title - Senior Network Engineer - Data Center/Enterprise-level Experience

UnumCompany Name - Unum

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Remote or Atlanta, Georgia, USA

Full-time

Our Fortune 500 company is driving a digital transformation and looking for forward-thinking innovators to disrupt how our industry thinks about and uses technology. As one of the world's leading employee benefits providers, we help millions of people gain affordable access to benefits that help them protect their families, their finances and their futures. Are you an asker of questions, a solver of problems, and a challenger of the status quo? Our mission is to provide a differentiated custome

Embedded Linux enigneerJob Title - Embedded Linux enigneer

Teksoft Systems IncCompany Name - Teksoft Systems Inc

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Mountain View, California, USA

Contract, Third Party

Experience in embedded systems or networking software Proficient in C and C++ Experience with Linux kernel, device drivers, and Yocto or Buildroot Solid understanding of Ethernet, IP stack, and hardware-based packet processing Familiarity with at least one network switching ASIC (Broadcom, Marvell, or Microchip preferred) Basic electrical engineering knowledge for low-level debugging Good to have Experience with PTP (Precision Time Protocol) Exposure to RTOS environments Background in function

ASIC Engineer (Design Verification)Job Title - ASIC Engineer (Design Verification)

CloudiousCompany Name - Cloudious

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Sunnyvale, California, USA

Third Party, Contract

ASIC Engineer (Design Verification) Bay Area, CA or Austin, TX 12 Months Responsibilities Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification. Develop functional tests based on verification test plan. Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage. Debug, root-cause and resolve functional failures in the design, partnering with the Design team. Collab

Network Operations EngineerJob Title - Network Operations Engineer

Tranzeal, Inc.Company Name - Tranzeal, Inc.

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Santa Clara, California, USA

Contract

10 years of experience in designing, configuring, and implementing enterprise-class network solutions using Cisco, Arista and Mellanox hardware.Expert level knowledge of troubleshooting, implementing, optimizing and testing of dynamic routing protocols such as EIGRP, OSPF, BGP and ability to interpret and resolve complex route table problem.Knowledge of EVPN & VXLAN is highly preferred.Network Security (L3) with primary skills on Palo Alto and Cisco Firewalls.3+ year of Prisma Cloud Enterprise e

Lead WLAN ConsultantJob Title - Lead WLAN Consultant

Key2Source INCCompany Name - Key2Source INC

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Santa Clara, California, USA

Full-time

Job Title: Software Lead WLAN Location: Santa Clara, CA (Hybrid) Experience Required: 10+ Years Role Type: Fulltime Experience: 8 - 15 Years Must Have C/C++, Wireless 802.11 Product development, WiFi Job Description: We are seeking a highly skilled wireless embedded software professional to work with the team to provide wireless solutions. We develop a diverse portfolio of in-chassis, gateway, edge, and wireless products for the automation industry. The Wireless Software lead will be a collabora

Senior Design Verification EngineerJob Title - Senior Design Verification Engineer

Marici SolutionsCompany Name - Marici Solutions

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Mountain View, California, USA

Contract

Position: Senior Design Verification Engineer Location: Mountainview, California (Complete onsite) Experience: 7 to 12 years only (Relevant) What candidate will Be Doing: Strong expertise along-with complex SoC/IP debug is mustAt-least 5+ years of experience in System Verilog HVL and C/C++.AMBA AXI bus along-with ARM or C based processorBi-frost/Processor based C and SV/UVM mix Verification. What we are looking for: A bachelor s degree in electrical or computer engineering, accompanied by a mi

Design Verification EngineerJob Title - Design Verification Engineer

VeearCompany Name - Veear

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Sunnyvale, California, USA

Contract

Requirements: Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.Hands-on experience in Verilog, SystemVerilog, C/C++ based verification and UVM methodology.Experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies.Experience in one or more of the following areas along with functional verification - SV Assertions, Formal, Emulation.Experience in EDA tools and scripting (Pytho

Design Verification EngineerJob Title - Design Verification Engineer

Mindsource IncCompany Name - Mindsource Inc

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Sunnyvale, California, USA

Contract

Title: Sr. Design Verification Engineer Location: Onsite - Sunnyvale, CA (or) Austin, TX Duration: Long-term Type: Contract (W2/C2C) Rate: $110-$115/hr Responsibilities: Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification Develop functional tests based on verification test plan Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage Debug, root-cause, and resol

Lab adminJob Title - Lab admin

Info Way SolutionsCompany Name - Info Way Solutions

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San Jose, California, USA

Contract

Role: Lap Admin Location: San Jose ,CA We are seeking a detail-oriented and technically proficient Lab Administrator to manage, maintain, and support our lab infrastructure. This role includes racking and stacking hardware, configuring Cisco networking equipment, deploying servers and clients, and maintaining a secure, efficient, and organized lab environment. The ideal candidate has hands-on experience with network gear, server infrastructure, and a solid understanding of system administration.

Principal Digital Design EngineerJob Title - Principal Digital Design Engineer

OSI Engineering, Inc.Company Name - OSI Engineering, Inc.

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San Jose, California, USA

Full-time

Principal Digital Design Engineer A premier chip and silicon IP provider focused on accelerating and securing data is seeking an exceptional Principal Digital Design Engineer to join its Memory Interface Chip (MIC) team in San Jose, CA. This is an exciting opportunity to work alongside some of the industry s most innovative engineers on cutting-edge technology that drives faster and more secure data solutions. In this full-time role, the Principal Digital Design Engineer will report directly to

Design Verification Engineer || Mountain View, CA (Onsite)Job Title - Design Verification Engineer || Mountain View, CA (Onsite)

E-Solutions, Inc.Company Name - E-Solutions, Inc.

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Mountain View, California, USA

Full-time

Job Role- Design Verification Engineer Location- Mountain View, CA (Onsite) Job Descriptions- Key Responsibilities: Strong understanding of SV and UVM and good debugging skills. Understanding of AMBA protocols. Understand design specs and develop test plans based on functional and architectural requirements Build UVM/System Verilog-based verification environments for IP/subsystem/SoC level testing Develop directed and random testcases, perform coverage analysis, and close functional/code cover

Senior ASIC Design EngineerJob Title - Senior ASIC Design Engineer

PeopleNTechCompany Name - PeopleNTech

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San Jose, California, USA

Third Party, Contract

What candidate will Be Doing: Map multi-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds, and testbenches to simulate FPGA components.Establish prototyping systems in the lab and contribute to defining, evolving, and supporting our prototyping methodology.Option to engage in block-level RTL design or block or top-level IP integration.Collaborate with Software, Design, and Verification teams to validate the functional and performance objectives of the S

Senior ASIC Design EngineerJob Title - Senior ASIC Design Engineer

PeopleNTechCompany Name - PeopleNTech

•

San Jose, California, USA

Contract, Third Party

Position: Senior ASIC Design Engineer Location: San Jose, CA (Complete onsite) Experience: 8+ years (Relevant) What candidate will Be Doing: Map multi-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds, and testbenches to simulate FPGA components. Establish prototyping systems in the lab and contribute to defining, evolving, and supporting our prototyping methodology. Option to engage in block-level RTL design or block or top-level IP integration. Colla

IT Program Manager - Software Products M&AJob Title - IT Program Manager - Software Products M&A

Acunor InfotechCompany Name - Acunor Infotech

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Palo Alto, California, USA

Contract, Third Party

Job Title: IT M&A Program Manager Software Products Location: Palo Alto, CA - Hybrid (3 days a week) Type: Contract About the Role We're looking for an experienced IT M&A Program Manager to lead the technology strategy and execution for software-focused mergers, acquisitions, and divestitures. This is a high-impact role responsible for the entire IT M&A lifecycle-from technical due diligence through integration planning and go-live to post-merger optimization. You will work closely with cros

Principal Verification EngineerJob Title - Principal Verification Engineer

OSI Engineering, Inc.Company Name - OSI Engineering, Inc.

•

San Jose, California, USA

Full-time

A leading chip and silicon IP provider is looking to hire a talented Principal Verification Engineer to join its Memory Interconnect Design team in either San Jose, CA or Morrisville, NC. This is a great opportunity to work alongside some of the industry's top engineers to help develop cutting-edge technologies that accelerate and secure data. In this full-time role, the Principal Verification Engineer will report to the Director of Design Engineering and take a key role in product development a

RTL Engineer: Integrate RISC-V Core to SoCJob Title - RTL Engineer: Integrate RISC-V Core to SoC

Intelliswift Software IncCompany Name - Intelliswift Software Inc

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Santa Clara, California, USA

Contract

Job Title: RTL Engineer: Integrate RISC-V Core to SoC Location(s): Santa Clara, CA - Onsite Must Have skills: 5+ years of experience in RTL design, SoC integration, or related areas.Strong hands-on experience with hardware description languages (Verilog, SystemVerilog, VHDL), EDA tools, and simulators (VCS, NC, Verilator).Deep understanding of SoC design, integration, and high-performance interfaces (e.g., AXI, TileLink, PCIe, Ethernet).Proven ability to debug and optimize designs for functiona

Principal Design Verification EngineerJob Title - Principal Design Verification Engineer

OSI Engineering, Inc.Company Name - OSI Engineering, Inc.

•

San Jose, California, USA

Full-time

Principal Design Verification Engineer A leading chip and silicon IP provider focused on accelerating and securing data is looking to hire an outstanding Principal Design Verification Engineer to join its Memory Interface Chip (MIC) team in San Jose, CA. This role offers the chance to work alongside top engineering talent on innovative products that push the boundaries of speed and data security. As a Principal Design Verification Engineer, you ll play a critical role in the development of MIC

GPU RTL/FW EngineerJob Title - GPU RTL/FW Engineer

Mastech DigitalCompany Name - Mastech Digital

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San Jose, California, USA

Contract

Mastech Digital provides digital and mainstream technology staff as well as Digital Transformation Services for all American Corporations. We are currently seeking a GPU RTL/FW Engineer for our client in the Electronics domain. We value our professionals, providing comprehensive benefits and the opportunity for growth. This is a Contract position, and the client is looking for someone to start immediately. Duration: 6+ Months Contract Location: San Jose, CA; San Diego, CA; Austin, TX - Hybrid Sa

Senior ASIC Design EngineerJob Title - Senior ASIC Design Engineer

Marici SolutionsCompany Name - Marici Solutions

•

San Jose, California, USA

Contract

Position: Senior ASIC Design Engineer Emulation(HAPS Engineer) Location: San Jose, CA (Complete onsite) Experience: 8+ years (Relevant) What candidate will Be Doing: Map multi-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds, and testbenches to simulate FPGA components. Establish prototyping systems in the lab and contribute to defining, evolving, and supporting our prototyping methodology. Option to engage in block-level RTL design or block or top-lev