tactical data network design engineer Jobs in san jose, ca

161 - 180 of 204 Jobs

FPGA Design EngineerJob Title - FPGA Design Engineer

DraperCompany Name - Draper

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Remote or Cambridge, Massachusetts, USA

Full-time

Overview: Draper is an independent, nonprofit research and development company headquartered in Cambridge, MA. The 2,000+ employees of Draper tackle important national challenges with a promise of delivering successful and usable solutions. From military defense and space exploration to biomedical engineering, lives often depend on the solutions we provide. Our multidisciplinary teams of engineers and scientists work in a collaborative environment that inspires the cross-fertilization of ideas

Principal FPGA Design EngineerJob Title - Principal FPGA Design Engineer

DraperCompany Name - Draper

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Remote or Cambridge, Massachusetts, USA

Full-time

Sales Compensation Design Analyst(W2 Contract)Job Title - Sales Compensation Design Analyst(W2 Contract)

Judge Group, Inc.Company Name - Judge Group, Inc.

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Pleasanton, California, USA

Contract

Location: Pleasanton, CA Salary: $50.00 USD Hourly - $55.00 USD Hourly Description: Job Title: Sales Compensation Design Analyst Location: Pleasanton, CA (Hybrid) Contract: Long Term Contract About the Role As a Sales Compensation Design Analyst, you will support clients Sales Compensation team in designing, implementing, measuring, and executing our global sales commission plans in alignment with our sales strategy, annual objectives, and sales compensation philosophy. In this role, you wi

Senior Mixed -Signal ASIC Design Engineer (32626)Job Title - Senior Mixed -Signal ASIC Design Engineer (32626)

Myticas LLCCompany Name - Myticas LLC

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Remote or Sunnyvale, California, USA

Contract

Our client is seeking a Senior Mixed-Signal ASIC Design Engineer to join a dynamic team working on next-generation integrated circuits for high-performance communication and data center applications. Responsibilities: Design and simulate high-resolution data converters (DACs/ADCs) and low-power analog circuits such as bandgap references, opamps, and output buffers. Develop layout floorplans, supervise layout activities, and provide clear guidance to layout engineers (hands-on layout work may be

Staff Engineer, CPU Design VerificationJob Title - Staff Engineer, CPU Design Verification

Samsung Electronics AmericaCompany Name - Samsung Electronics America

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San Jose, California, USA

Full-time

Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries o

Sr. Electrical Design Engineer (Embedded Firmware)Job Title - Sr. Electrical Design Engineer (Embedded Firmware)

KLACompany Name - KLA

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Milpitas, California, USA

Full-time

Company Overview KLA is a global leader in diversified electronics for the semiconductor manufacturing ecosystem. Virtually every electronic device in the world is produced using our technologies. No laptop, smartphone, wearable device, voice-controlled gadget, flexible screen, VR device or smart car would have made it into your hands without us. KLA invents systems and solutions for the manufacturing of wafers and reticles, integrated circuits, packaging, printed circuit boards and flat panel d

Design Verification EngineerJob Title - Design Verification Engineer

Avance ConsultingCompany Name - Avance Consulting

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Mountain View, California, USA

Contract

Job Description Strong understanding of SV and UVM and good debugging skills. Understanding of AMBA protocols. Understand design specs and develop test plans based on functional and architectural requirements Build UVM/System Verilog-based verification environments for IP/subsystem/SoC level testing Develop directed and random testcases, perform coverage analysis, and close functional/code coverage Debug simulation failures and work closely with RTL designers to resolve issues Execute regressio

Mechanical Design Engineer, Battery Structures DesignJob Title - Mechanical Design Engineer, Battery Structures Design

Tesla MotorsCompany Name - Tesla Motors

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Palo Alto, California, USA

Full-time

We are seeking a talented Mechanical Design Engineer to join our Structural Design team within the Battery Engineering organization in Palo Alto, CA. This role focuses on enhancing designs for current Tesla vehicles and defining structural designs for future models. Collaboration with factory-based colleagues and cross-functional teams will be essential to integrate vehicle and powertrain engineering, develop innovative processes, and advance safety and reliability standards in electric vehicles

Sr. Electrical Design EngineerJob Title - Sr. Electrical Design Engineer

KLACompany Name - KLA

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Milpitas, California, USA

Full-time

Design VerificationJob Title - Design Verification

Xpeerant IncorporatedCompany Name - Xpeerant Incorporated

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San Jose, California, USA

Contract

Xpeerant prides itself in assisting our customers to achieve Market Window success by identifying and placing critical resource requirements. Securing the right talent is the most critical component of any project and directly relates to the success of any business. Market opportunities wait for no one. Finding the ideal fit is what Xpeerant has done for the last 26 years! We have a DV contract located in San Jose, CA. Someone with good design and verification experiences on protocol and proce

Design verification EngineerJob Title - Design verification Engineer

Enfycon IncCompany Name - Enfycon Inc

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Remote or Mountain View, California, USA

Contract

Minimum Qualifications: Design Verification Engineering ServicesTestbench development System Verilog Universal Methodology (UVM), Python, and C testsIntegration/development of C tests/Application Programming Interface (APIs) and software build flowIntegration of UVM testbenchesTest development and debug, including without limitation tests for functionality, power, performance, error, and connectivity, both for RTL and Gate Level Netlist Design Under Test, tests for functional and code coverage

Design Verification EngineerJob Title - Design Verification Engineer

Innova Solutions, IncCompany Name - Innova Solutions, Inc

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Mountain View, California, USA

Contract

A client of Innova Solutions is immediately hiring for a Design Verification Engineer Position type: Contract Location: Mountain View, CA-Onsite As a Design Verification Engineer, you will be responsible for: Job description: Strong understanding of SV and UVM and good debugging skills.Understanding of AMBA protocols.Understand design specs and develop test plans based on functional and architectural requirements.Build UVM/System Verilog-based verification environments for IP/subsystem/SoC leve

EDVT (Electrical Design Verification Test) EngineerJob Title - EDVT (Electrical Design Verification Test) Engineer

Recruitment.aiCompany Name - Recruitment.ai

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San Jose, California, USA

Contract

Position: EDVT (Electrical Design Verification Test) Engineer Location: San Jose, CA - Onsite Role & Responsibilities:Participates on a project team of engineers involved in the specification, design, development, and test of hardware. Defines the unit and system level test processes and procedures.Performs complex system level unit and integration test. Debug/Mitigate complex system level problems.This engineer will work closely with hardware design engineers, software/diagnostic engineers, an

Sr. Hardware Design EngineerJob Title - Sr. Hardware Design Engineer

SUPERMICRO COMPUTER INCCompany Name - SUPERMICRO COMPUTER INC

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San Jose, California, USA

Full-time

Job Req ID: 27105 About Supermicro: Supermicro is a Top Tier provider of advanced server, storage, and networking solutions for Data Center, Cloud Computing, Enterprise IT, Hadoop/ Big Data, Hyperscale, HPC and IoT/Embedded customers worldwide. We are the #5 fastest growing company among the Silicon Valley Top 50 technology firms. Our unprecedented global expansion has provided us with the opportunity to offer a large number of new positions to the technology community. We seek talented, pass

ASIC Engineer, Design VerificationJob Title - ASIC Engineer, Design Verification

Meta Platforms, Inc. (f/k/a Facebook, Inc.)Company Name - Meta Platforms, Inc. (f/k/a Facebook, Inc.)

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Sunnyvale, California, USA

Full-time

Meta Platforms, Inc. (f/k/a Facebook, Inc.) has the following positions in Sunnyvale, CA ASIC Engineer, Design Verification: Define and implement block/IP/SoC verification plans, build verification test benches to enable block/IP/sub-system/SoC level verification. (ref. code REQ-2503-148189: $178,763/year to $192,170/year). Individual pay is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base salary only, and do not include

NX Design EngineerJob Title - NX Design Engineer

Mice GroupsCompany Name - Mice Groups

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Sunnyvale, California, USA

Third Party, Contract

We have an exciting new opportunity for 1 2 Mechanical Design Contractors to support a high-impact engineering project based in the South Bay/Silicon Valley area. This is a 100% onsite role with a well-established engineering services firm, working on a confidential project for a major end-user in the semiconductor industry. Position Overview Role: Mechanical Designer (NX CAD with TeamCenter)Location: South Bay / Silicon Valley (Onsite Only)Duration: 3 6 MonthsPay Rate: $50 $55/hr (W2, H1B, or 3

Senior ASIC Design EngineerJob Title - Senior ASIC Design Engineer

CloudiousCompany Name - Cloudious

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San Jose, California, USA

Contract

Job Description: Map multi-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds, and testbenches to simulate FPGA components. Establish prototyping systems in the lab and contribute to defining, evolving, and supporting our prototyping methodology. Option to engage in block-level RTL design or block or top-level IP integration. Collaborate with Software, Design, and Verification teams to validate the functional and performance objectives of the SoC. What

RTL design EngineerJob Title - RTL design Engineer

Mirafra IncCompany Name - Mirafra Inc

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San Jose, California, USA

Full-time

Job Description: Strong Logic Design, RTL coding (Verilog HDL) and debugging skills Analyze and resolve Lint, CDC and RDC issues in the design Understanding of low power design and validation techniques including UPF Experience with constraint generation, timing closure analysis, formal verification, low power checks using UPF flows and ECO implementation. Experience with writing assertions and doing negative checks to validate assertions Experience with Silicon validation/Bring-up Experience w

Hardware Design Engineer 5Job Title - Hardware Design Engineer 5

ExperisCompany Name - Experis

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Mountain View, California, USA

Full-time

Our client, a leader in the technology sector, is seeking a Hardware Design Engineer 5 to join their team. As a Hardware Design Engineer 5, you will be part of the engineering department supporting the development of next-generation AI hardware. The ideal candidate will have strong analytical skills, a collaborative spirit, and a passion for innovation, which will align successfully in the organization. Job Title: Hardware Design Engineer 5 Location: Austin, TX and Mountain View, CA Duration:

CAD/EDA Silicon Design/Verification Infrastructure EngineerJob Title - CAD/EDA Silicon Design/Verification Infrastructure Engineer

Datum Software, Inc.Company Name - Datum Software, Inc.

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Santa Clara, California, USA

Full-time

Position Title: CAD/EDA Silicon Design/Verification Infrastructure Engineer Location: Santa Clara, CA Term: Possible 3-Month Contract-to-Hire (CTH) Job Description: We are seeking a CAD/EDA Silicon Design/Verification Infrastructure Engineer with strong experience in SoC/IP design and verification infrastructure. The ideal candidate will have hands-on expertise in Python, SystemVerilog/UVM, and working in Linux-based environments. Minimum Qualifications: 5+ years of experience in EDA/CAD for SoC