FPGA Digital Design Engineer Jobs in San Jose, CA

1 - 20 of 2,363 Jobs

Digital Design Engineer (Staff)Job Title - Digital Design Engineer (Staff)

Qualcomm TechnologiesCompany Name - Qualcomm Technologies

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Santa Clara, California, USA

Full-time

Company:Qualcomm Atheros, Inc. Job Area:Engineering Group, Engineering Group > ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/S

Principal Digital Design Engineer, SoCJob Title - Principal Digital Design Engineer, SoC

Island StaffingCompany Name - Island Staffing

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San Jose, California, USA

Full-time

As a Principal Engineer/Manager, Digital Design SoC, you will be leading with a small team of design engineers to develop novel SoC products for connectivity and communications. You will also be a key contributor to product definition and resulting detailed device performance and functional requirements specifications. You will support other discipline teams to bring the SoC device to successful mass production. This full-time position is based in San Jose, CA. Key Responsibilities Review and co

Digital Design EngineerJob Title - Digital Design Engineer

Qualcomm TechnologiesCompany Name - Qualcomm Technologies

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Santa Clara, California, USA

Full-time

Company:Qualcomm Atheros, Inc. Job Area:Engineering Group, Engineering Group > ASICS Engineering General Summary: Working with the WiFi algorithm and systems team to design and test advanced WiFi functionalities such as OFDM and OFDMA modulators and demodulators, transmit beamforming, timing and synchronization, RF impairment correction, adaptive filters Working with the algorithms/systems/modeling team to obtain a fixed-point/finite-precision C/C++ model that is realizable in optimized ASIC h

Digital Layout Design EngineerJob Title - Digital Layout Design Engineer

Apple, Inc.Company Name - Apple, Inc.

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Cupertino, California, USA

Full-time

Summary Do you have a passion for crafting entirely new solutions?As part of our Digital Design Engineering group, you'll take imaginative and revolutionary ideas and determine how to turn them into reality! You and your team will apply engineering fundamentals and start from scratch if needed, bringing forward-thinking ideas to the real world. Join us, and you'll help design the tools that allow us to bring customers experiences they've never before envisioned.You will be part of an exciting s

RTL Design Engineer - Senior - HybridJob Title - RTL Design Engineer - Senior - Hybrid

VIVA USA INCCompany Name - VIVA USA INC

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Santa Clara, California, USA

Contract

Title: RTL Design Engineer - Senior Description: KEY RESPONSIBILITIES: Microarchitecture development of IP subsystems Perform RTL design of digital components. Work with functional verification team to meet coverage and quality standards. Analyze/fix Lint and CDC errors of the components. Guarantee quality/timely deliverables meeting project s schedule. Help to improve/automate design process. Support post-silicon product bring-up/debug. PREFERRED EXPERIENCE: 10 years' experience in RTL coding K

Design Verification Engineer with UVM,OVM, SystemVerilog & PythonJob Title - Design Verification Engineer with UVM,OVM, SystemVerilog & Python

PDDN IncCompany Name - PDDN Inc

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Santa Clara, California, USA

Third Party, Contract

Role: Design Verification Engineer Location: Santa Clara, CA Interview: Phone/Skype Job Type: Contract Background check: Mandatory Meet and great: Mandatory UVM/OVM/SystemVerilog/Python/C/C++ Responsibilities: Architect and Create verification environments using System-Verilog and Universal verification methodology-UVM IPs and SoCs with embedded CPUs and analog mixed-signal interfaces. Develop test plans and coverage metrics from specifications and writing block and chip-level tests. Creat

ASIC Design EngineerJob Title - ASIC Design Engineer

Apple, Inc.Company Name - Apple, Inc.

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Cupertino, California, USA

Full-time

Summary As an ASIC Design Engineer, the individual's primary responsibility will be RTL design. This will include chip architecture definition, block/function definition, specification, design, simulation and unit level verification of digital functions on Mixed Signal ASICs. Key Qualifications Proven track-record in digital design including RTL design experienceStrong understanding of digital design flow including RTL simulation, logic synthesis, timing constraints, timing closure, STA, back

Embedded FPGA EngineerJob Title - Embedded FPGA Engineer

Thermo Fisher ScientificCompany Name - Thermo Fisher Scientific

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San Jose, California, USA

Full-time

Job Description When you join us at Thermo Fisher Scientific, you'll be part of a smart, driven team that shares your passion for exploration and discovery. With revenues of $20 billion and the largest investment in R&D in the industry, we give our people the resources and opportunities to make significant contributions to the world. How will you make an impact? This is a unique opportunity to join a senior level team of engineers at our San Jose, CA site. You will play a vital role in the des

ASIC Design EngineerJob Title - ASIC Design Engineer

BlackFern RecruitmentCompany Name - BlackFern Recruitment

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Milpitas, California, USA

Full-time

Job Description Front-End ASIC Design Engineer - Milpitas, CA Our client develops and delivers ASIC and SoC solutions to customers worldwide in some of the hottest technology areas. The Front-End ASIC Design Engineer will be a key person in this growing design department. Micro-architecture experience is required. Great opportunity to work on current, ongoing and upcoming new projects. Hybrid remote/onsite position. Primary responsibilities include: Support customer s design through all phases o

Design Verification Engineer - Neural EngineJob Title - Design Verification Engineer - Neural Engine

Apple, Inc.Company Name - Apple, Inc.

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Cupertino, California, USA

Full-time

Summary At Apple, our new ideas have a way of becoming phenomenal products, services, and customer experiences very quickly! As part of a highly hardworking team you will be at the heart of developing the next generation of Apple's Neural Engine. You will be collaborating with all subject areas with critical impact in getting top quality products to millions of customers. We bring passion and dedication to our job and when you are a part of our team there's no telling what you could accomplish.

Design Verification Engineer - Neural EngineJob Title - Design Verification Engineer - Neural Engine

Apple, Inc.Company Name - Apple, Inc.

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Cupertino, California, USA

Full-time

RTL Design Engineer - HybridJob Title - RTL Design Engineer - Hybrid

VIVA USA INCCompany Name - VIVA USA INC

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Santa Clara, California, USA

Contract

Title: RTL Design Engineer - Hybrid Description: Looking for RTL design integration Engineer. JOB DUTIES: Responsible for RTL design using Verilog HDL for implementation and debug. Read and comprehend System on Chip level architectural specification. Write microarchitecture specification for new and modified functions. Responsible for linting and simulation of design. Work with synthesis and backend teams for physical implementation. EDUCATION: Bachelor's or Master's in Computer Engineering KE

Standard Cell Design Methodology & Flow EngineerJob Title - Standard Cell Design Methodology & Flow Engineer

Apple, Inc.Company Name - Apple, Inc.

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Santa Clara, California, USA

Full-time

Summary Do you have passion to join a world-class Digital Design Engineering group and take imaginative and revolutionary ideas and determine how to turn them into reality! You will apply engineering fundamentals and start from scratch if needed, bringing forward-thinking and groundbreaking ideas to the real world. You'll help design the tools that allow us to bring customers experiences they've never-before envisioned. We have an extraordinary opportunity for Standard Cell Design Methodology a

Connectivity RF Hardware Design EngineerJob Title - Connectivity RF Hardware Design Engineer

Apple, Inc.Company Name - Apple, Inc.

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Sunnyvale, California, USA

Full-time

Summary Do you have a passion for taking on big challenges? Do you love pushing the limits of what's considered feasible? As part of our Wireless Hardware group, you'll be responsible for bringing groundbreaking wireless connectivity to the world. On this team, you'll help improve the performance of our products through innovative system-on-chip designs. You and your team will build platform architecture that paves the way for all-new experiences, including the ones that allow people to take ad

mmWave IC Design EngineerJob Title - mmWave IC Design Engineer

Apple, Inc.Company Name - Apple, Inc.

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Sunnyvale, California, USA

Full-time

Summary Would you like to be a part of Apple's fast-growing mmWave and cellular wireless design team? We are responsible for all aspects of mmWave/cellular silicon development with a particular emphasis on highly integrated and efficient designs and technologies that transform the user experience at the product level! As a millimeter-wave IC design engineer, you will be the owner of providing circuit and system solutions for multi-gigabit wireless chips! We have multiple needs and are open to m

Hardware Design EngineerJob Title - Hardware Design Engineer

Zachary Piper Solutions, LLCCompany Name - Zachary Piper Solutions, LLC

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San Jose, California, USA

Full-time

Piper Companies is seeking an experienced Hardware Design Engineer with a deep understand of hardware design and validation. The ideal Hardware Design Engineer must sit onsite in San Jose, CA and thrive in a large strategic organization. Responsibilities of the Hardware Design Engineer : Develop and validate reliable and efficient hardware solutions Monitor, run failure analysis and board debug for optimal hardware design performance Interface with FPGA CAD, Mechanical, Power, Signal Integr

mmWave IC Design EngineerJob Title - mmWave IC Design Engineer

Apple, Inc.Company Name - Apple, Inc.

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Sunnyvale, California, USA

Full-time

Hardware Design EngineerJob Title - Hardware Design Engineer

Randstad DigitalCompany Name - Randstad Digital

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Mountain View, California, USA

Contract

job summary: Define, document, and implement a UVM verification environment including agents and scoreboards Write test plans and implement them by developing tests, test generators, test benches, checkers, coverage, and other verification collateral Run tests on RTL and Gate Level Netlists, debug failures to root cause, and recommend fixes Support post-silicon verification activities of the products working with design and product teams location: Mountain View, California job type: Contract s

Physical Design STA EngineerJob Title - Physical Design STA Engineer

Xoriant CorporationCompany Name - Xoriant Corporation

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San Jose, California, USA

Contract

Hi, This is Himanshu from Xoriant, sharing the below job description for one of our open requirements, please have a look and let me know your valuable feedback along with your updated resume and best time to reach you. Job Position: Physical Design STA Engineer Job Location: San Jose, CA (Hybrid) Job Duration: 6+ Months Contract Job Description: Sr. STA Engineer with15+ years experience for STA position (Physical Design Static Timing Analysis / STA Engineer).Perform static timing analysis (ST

RFIC Design EngineerJob Title - RFIC Design Engineer

Apple, Inc.Company Name - Apple, Inc.

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Sunnyvale, California, USA

Full-time

Summary Would you like to join Apple's growing wireless silicon development team? The wireless RFIC team architects, designs, and validates radio transceivers integrated into complex wireless SoCs. Our wireless organization is responsible for all aspects of wireless silicon development that transform the user experience at the product level, all of which is driven by a best-in-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture a