RTL design Jobs

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Sr. Staff Post Silicon Validation Engineer - Direct hire/Full time (Onsite)

Maxonic, Inc.

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Austin, Texas, USA

Full-time

Maxonic maintains a close and long-term relationship with our direct client. In support of their needs, we are looking for a Sr. Staff Post Silicon Validation Engineer Job Description: Job Title: Sr. Staff Post Silicon Validation Engineer Job Type: Fulltime Job Location: Austin, TX or Palo Alto, CA Work Schedule: Onsite 5 days a week The candidate will focus on developing Post-Silicon validation plan, debug tools, and infrastructure for a custom SoCs and Platform designs for Autopilot and AI. As
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Posted 16 days ago

FPGA Design Engineer

GlobalLogic Inc.

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Warren, New Jersey, USA

Third Party, Contract

Job Description: You will innovate in 4G, 5G, and O-RAN systems in a competitive atmosphere.Experience in FPGA design and development.Proficiency in Verilog/SystemVerilog for digital logic design.Experience with FPGA development tools such as Xilinx Vivado, and Intel Quartus.Knowledge of wireless communication systems, 4G/5G networks, and O-RAN architectures.Strong understanding of DSP algorithms and their FPGA implementations.Experience in debugging in the lab using Vivado ILAs and experience
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Posted 60+ days ago | Updated 11 hours ago

Sr ASIC/FPGA VHDL Design Engineer Secret Clearance Required No Sponsorship Available

ZoeTech Staffing LLC

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Camden, New Jersey, USA

Full-time

Schedule: 9/80 Regular with every other Friday off Job Description: Reporting to the Manager, Engineering (ASIC/FPGA), the Senior Member of Engineering Staff (SMES) will be part of the key ASIC/FPGA design team, responsible for the delivery of FPGA/ASICs for high-speed crypto applications. S/he will architect, implement high speed crypto architectures, on ASICs/Xilinx Zynq/MPSOC class FPGAs, with hands on design/debug with Ethernet, TCP/IP protocols. The company has state-of-the-art EDA flows/
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Posted 36 days ago | Updated 3 days ago

Design Verification Engineer

Innova Solutions, Inc

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Remote or Mountain View, California, USA

Third Party, Contract

A client of Innova Solutions is looking for an Design Verification Engineer. Position type: Contract Duration: 12+ Months Location: Mountain View, CA (Onsite Job) As a Design Verification Engineer, you will need: Minimum Qualifications: Experience in SV and UVM and good debugging skills.Understanding of AMBA protocols.Build UVM/System Verilog-based verification environments for IP/subsystem/SoC level testingDevelop directed and random testcases, perform coverage analysis, and close functional
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Posted 43 days ago | Updated 6 days ago

Senior Full Stack Engineer

Velocity Tech Inc

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Atlanta, Georgia, USA

Contract

Location: Atlanta, GA, Minneapolis, MN, Dallas, TX, Miramar, FL Must have skills - React (SME Level) Node JavaScript/TypeScript/ Micro Front End Architecture Responsive Application DesignJest, RTL, or similar test libraries Additionally very strong IdP skills related toPing for authentication (PingOne PingID) Migrating from Gigya to Ping in first quarter 2026 Good to have - Knowledge of AWS Services Job Duties & Responsibilities Development and implementation of complex web applications, focus
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Posted 2 days ago

High-Level AI Platform API Developer Sr. Software Engineer to work with a company a t the forefront of hardware technologies accelerating and optimizing FHE encryption via Artificial Intelligence.

VortexLink

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Campbell, California, USA

Full-time

High-Level AI Platform API Developer Sr. Software Engineer Fulltime opportunity in Campbell, CA(Hybrid) As a senior member of the System Software team, you will play a key role in crafting and evolving C/C++ APIs that enable AI/ML developers to program our ASIC fabric efficiently. You will also collaborate closely with the RTL team to understand the hardware architecture and develop functional tests for the ASIC. Our ASIC, a PCIe-based device with dataflow computational and memory resources, req
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Posted 60+ days ago | Updated 11 days ago

Design Verification Engineer

Yoh - A Day & Zimmerman Company

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Remote or Santa Clara, California, USA

Full-time

Design Verification Engineer Scope: Design and development of the IO subsystems for a high-performance SoC from scratch, working closely with the Architecture and RTL teams. Develop detailed block-level design specifications and plans for a high-performance IO Subsystem. Create and implement reusable block-level components in SV, UVM, and C++, including microarchitectural models, monitors, and checkers. Develop and optimize the IO subsystem design to ensure functionality and performance are in a
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Posted 60+ days ago | Updated 4 days ago

Design Verification Engineer

Yoh - A Day & Zimmerman Company

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Remote or Santa Clara, California, USA

Full-time

Design Verification Engineer Scope: Design and development of the IO subsystems for a high-performance SoC from scratch, working closely with the Architecture and RTL teams. Develop detailed block-level design specifications and plans for a high-performance IO Subsystem. Create and implement reusable block-level components in SV, UVM, and C++, including microarchitectural models, monitors, and checkers. Develop and optimize the IO subsystem design to ensure functionality and performance are in a
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Posted 60+ days ago | Updated 7 hours ago

Design Verification Engineer

JConnect Inc

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San Jose, California, USA

Full-time

Role: Design Verification Engineers (SoC-5, PCIe-5)Location: Bay AreaSalary: 160-240k (DOE) Free health insurancePTOs: 10 Business days (Including sick leaves) Key Skills: UVM, SoC, PCIe, High Bandwidth memory, Emulation (Zebu or Palladium) Job Description: Architect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA Develop test plans and coverage metrics from speci
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Posted 60+ days ago | Updated 1 day ago