Tcl Jobs in San Jose, CA

41 - 57 of 57 Jobs

Verification EngineerJob Title - Verification Engineer

Happiest Minds Technologies LimitedCompany Name - Happiest Minds Technologies Limited

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Fremont, California, USA

Third Party, Contract

Verification Engineer Fremont, CA BSEE or BSCS, or equivalent 5+ years of ASIC/FPGA verification experience using SystemVerilog / UVMMust have experience with:Verification flow using Questa simulationDeveloping verification plansDesigning and implementing SystemVerilog / UVM test benches for constrained-random verificationDeveloping functional coverage modelsWriting and debugging directed and random test casesExperience with automation/scripting (Python, Perl, sed, awk, tcl/tk, sh)Experience wit

RTL/ASIC Design EngineerJob Title - RTL/ASIC Design Engineer

NetwovenCompany Name - Netwoven

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San Jose, California, USA

Contract

KEY RESPONSIBILITIES: Microarchitecture development of IP subsystems Perform RTL design of digital components. Work with functional verification team to meet coverage and quality standards. Analyze/fix Lint and CDC errors of the components. Guarantee quality/timely deliverables meeting project s schedule. Help to improve/automate design process. Support post-silicon product bring-up/debug. PREFERRED EXPERIENCE: 10 years' experience in RTL coding Knowledge of PCIe Gen5 and PIPE specification Kno

Failure Analysis EngineerJob Title - Failure Analysis Engineer

Rootshell Enterprise Technologies Inc.Company Name - Rootshell Enterprise Technologies Inc.

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Santa Clara, California, USA

Full-time, Contract

Hello All, Greetings from Rootshell Inc. Rootshell Enterprise Technologies Inc. is a recognized provider of professional IT Consulting services in the US. We are actively seeking Failure Analysis Engineer for one of our client, Please share your resume with current location & full contact info Role: Failure Analysis Engineer Location:Santa Clara, California- Onsite Job description Expert technical skills in the manufacturing test environment, both PCBA and box build/system level assemblies.

Sr. Failure Analysis EngineerJob Title - Sr. Failure Analysis Engineer

Xoriant CorporationCompany Name - Xoriant Corporation

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Santa Clara, California, USA

Contract

Job Title: Sr. Failure Analysis Engineer Location: Santa Clara, CA Duration: 12+ Months Xoriant reasonably expects the pay rate for this position to be within the following range: $38.00/hour-$42.00/hour. Duties: This position is for a Sr. Failure Analysis Engineer. (On-Site 5 days/week) Primary Tasks: Drive returned product Failure Analysis, characterizing failures, and escalating issues and trends to the Hardware Quality Engineering team Resolve escalated RMA's by determining the hardware ro

Principal Digital Design Engineer, SoCJob Title - Principal Digital Design Engineer, SoC

Island StaffingCompany Name - Island Staffing

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San Jose, California, USA

Full-time

As a Principal Engineer/Manager, Digital Design SoC, you will be leading with a small team of design engineers to develop novel SoC products for connectivity and communications. You will also be a key contributor to product definition and resulting detailed device performance and functional requirements specifications. You will support other discipline teams to bring the SoC device to successful mass production. This full-time position is based in San Jose, CA. Key Responsibilities Review and co

DFT EngineerJob Title - DFT Engineer

Talent Software Services, IncCompany Name - Talent Software Services, Inc

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Santa Clara, California, USA

Contract

DFT EngineerJob Summary: Talent Software Services is in search of a DFT Engineer for a contract position in Santa Clara, CA. The opportunity will be eight months with a strong chance for a long-term extension.Primary Responsibilities/Accountabilities: Stitching multiple scan chains across different IP(mixed signal) and clock domains. Scan vectors generation, and verification at different stages of the design. Validating scan coverage across design. Provide SoC (top) level constraints and partiti

Lab/System AdministratorJob Title - Lab/System Administrator

EITAcies, Inc.Company Name - EITAcies, Inc.

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Santa Clara, California, USA

Full-time, Part-time, Contract, Third Party

About US : Since 2008, EITACIES has been a beacon of innovation, crafting tailored tech solutions. From humble beginnings, we've grown globally, nurturing client relationships and adapting to digital shifts. Today, we're a tech powerhouse, delivering customized excellence from startups to Fortune 500, State & Federal clients. Responsibilities: Typical job responsibilities will include: Implementation and management of Lab Automation utilizing Spirent Velocity platform. Architecture and Design o

ASIC Physical Designers - IIIJob Title - ASIC Physical Designers - III

MindlanceCompany Name - Mindlance

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Remote

Contract

100% Remote Job Responsibilities: Collaborate with the design team to understand and define physical design specifications for mixed signal circuits. Perform floor planning, power planning, and placement of digital and analog blocks. Physical design validation involving static timing and noise analysis. Power grid characterization and analysis using industry standard tools. Troubleshoot and resolve physical design issues and implement design changes. Work with DRC/LVS teams to ensure desig

Sr. Verification EngineerJob Title - Sr. Verification Engineer

Xpeerant IncorporatedCompany Name - Xpeerant Incorporated

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Remote

Contract

Xpeerant prides itself in assisting our customers to achieve Market Window success by identifying and placing critical resource requirements. Securing the right talent is the most critical component of any project and directly relates to the success of any business. Market opportunities wait for no one. Finding the ideal fit is what Xpeerant has done for the last 26 years! We have Verification Engineer opportunities! If you meet the following description, let us hear from you! Job Description:

Senior ASIC / FPGA Design Verification EngineerJob Title - Senior ASIC / FPGA Design Verification Engineer

Technical LinkCompany Name - Technical Link

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Remote

Contract

6 Months Fully remote Verification RESPONSIBILITIES The senior verifier will be called upon to: develop SystemVerilog (or VHDL) test benches for the verification of ASICs or FPGAs;apply the various techniques and approaches of the Universal Verification Methodology (UVM);contribute to the development of the test infrastructure;document and report problems found to designers and assist them in identifying the source of the problems;support laboratory testing.QUALIFICATIONS Experience in writing

Physical Design EngineerJob Title - Physical Design Engineer

Xoriant CorporationCompany Name - Xoriant Corporation

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San Jose, California, USA

Contract

Job Title: Physical Design Engineer Location: San Jose, CA (hybrid) Duration: 6+ months (Possible Extension-Long Term Project) Rate: $100/hr on w2 Description Perform physical implementation in Synopsys tools (ICC2)Develop and maintain the tool flow to support the project.Work with Team to enhance PD methodology.Fixing DRC/LVS issuesFixing voltage drop violationsTiming ECOsRequirements Experience in advanced node processes 16nm and below.Experience with industry-standard tools, preference for Sy

ASIC Physical Design EngineerJob Title - ASIC Physical Design Engineer

BCforwardCompany Name - BCforward

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Remote

Contract

ASIC Physical Design Engineer BCforward is currently seeking a highly motivated ASIC Physical Design Engineer for an opportunity in Remote or Hybrid(if Austin, TX) Position Title: ASIC Physical Design Engineer Location: Remote (or) Hybrid(if Austin, TX) Anticipated Start Date: May 2024 Please note this is the target date and is subject to change. BCforward will send official notice ahead of a confirmed start date. Expected Duration: 06 Months with possible extension Job Type: Contract Pa

Design for Test (DFT) EngineerJob Title - Design for Test (DFT) Engineer

Xoriant CorporationCompany Name - Xoriant Corporation

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San Jose, California, USA

Contract

Title: Design for Test (DFT) Engineer Location: San Jose, CA Duration: 6+ months (Possible Extension-Long Term Project) Rate: $100/hr on w2 Description Design for Test (DFT) Engineer 5 years experience with the following:ATPG (stuck, transition delay, bridge) with Synopsys Tetramax/Mentor TestKompressATPG pattern generation, coverage analysis and ATPG simulation.Ability to debug ATPG simulation failures is a plus.DFT insertion using DFT CompilerGood TCL and PERL scripting skillsMBIST insertion

PLM Teamcenter Consultant- Remote- TCICJob Title - PLM Teamcenter Consultant- Remote- TCIC

HirexCompany Name - Hirex

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Remote

Contract, Third Party

Job Role : PLM Teamcenter Consultant- with TCIC Location : Remote Duration : Long Term Contract Required Knowledge: ITK server-side coding experience with C and C++ including Teamcenter workflows ,Good Knowledge of TCIC , TCIC Silent ImportExperience in SQL, C++, Visual Basic, .NET, Java/JavaScript, TCL scripting and XML and the ability to easily pick up and understand another Object-Oriented programming languageExpertise in CATIA or other CAD integrations to Teamcenter Is highly desired, but no

ASIC Verification EngineerJob Title - ASIC Verification Engineer

Q1 Technologies, Inc.Company Name - Q1 Technologies, Inc.

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Remote or Santa Clarita, California, USA

Full-time, Contract, Third Party

Job Title : ASIC Verification Engineer Location: Bay Area, CA & Austin, Texas (Onsite only) Opening 10 Mandatory Skills: Design Verification, UVM, IP, SOC, System Verilog Job Description: Experience in pre-silicon RTL Verification /IP Verification / SOC verification Strong knowledge of System Verilog and working knowledge of recent verification methodologies (UVM) Domain expertise in one or more of the following areas System-on-a-chip verification with multiple CPUs and fixed function units

FPGA Design EngineerJob Title - FPGA Design Engineer

BlackFern RecruitmentCompany Name - BlackFern Recruitment

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Remote

Full-time

100% Remote for candidates residing in the states of PA, DE, MD, VA and NJ. Our client is a technology leader delivering high-performance fabrics for High Performance Computing (HPC), High Performance Data Analytics (HPDA), and Artificial Intelligence (AI) for the purpose of delivering interconnect solutions that enable their customers to optimally apply vast computational resources to solve the worlds toughest problems. Our client is hiring talented engineers to facilitate the delivery of the n

Physical Design EngineerJob Title - Physical Design Engineer

Xoriant CorporationCompany Name - Xoriant Corporation

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Remote

Contract

Job Title: Physical Design Engineer (SoC) Location: Remote Project Duration: 6+ months (Possible Extension-Long Term Project) Description Perform physical implementation in Synopsys tools (ICC2)Develop and maintain the tool flow to support the project.Work with Team to enhance PD methodology.Fixing DRC/LVS issuesFixing voltage drop violationsTiming ECOsRequirements Experience in advanced node processes 16nm and below.Experience with industry-standard tools, preference for Synopsys flow.Understan