asic verification engineer Jobs

21 - 40 of 92 Jobs

Advanced ASIC FPGA Verification EngineerJob Title - Advanced ASIC FPGA Verification Engineer

General DynamicsCompany Name - General Dynamics

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Scottsdale, Arizona, USA

Full-time

Basic Qualifications Bachelor's degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field, plus a minimum of 5 years of relevant experience; or Master's degree plus a minimum of 3 years of relevant experience. CLEARANCE REQUIREMENTS: Department of Defense TS/SCI security clearance is preferred at time of hire. Candidates must be able to obtain a TS/SCI clearance within a reasonable amount of time from date of hire. Applicants selected will be subject

Senior Advanced ASIC FPGA Verification EngineerJob Title - Senior Advanced ASIC FPGA Verification Engineer

General DynamicsCompany Name - General Dynamics

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Scottsdale, Arizona, USA

Full-time

Basic Qualifications Bachelor's degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field, plus a minimum of 8 years of relevant experience; or Master's degree plus a minimum of 6 years of relevant experience. CLEARANCE REQUIREMENTS: Department of Defense TS/SCI security clearance is preferred at time of hire. Candidates must be able to obtain a TS/SCI clearance within a reasonable amount of time from date of hire. Applicants selected will be subject

ASIC Engineer (Design Verification)Job Title - ASIC Engineer (Design Verification)

CloudiousCompany Name - Cloudious

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Sunnyvale, California, USA

Contract, Third Party

ASIC Engineer (Design Verification) Bay Area, CA or Austin, TX 12 Months Responsibilities Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification. Develop functional tests based on verification test plan. Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage. Debug, root-cause and resolve functional failures in the design, partnering with the Design team. Collab

ASIC Engineer, Senior Staff, Physical Design VerificationJob Title - ASIC Engineer, Senior Staff, Physical Design Verification

Juniper NetworksCompany Name - Juniper Networks

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Sunnyvale, California, USA

Full-time

At Juniper, we believe the network is the single greatest vehicle for knowledge, understanding, and human advancement the world has ever known. To achieve real outcomes, we know that experience is the most important requirement for networking teams and the people they serve. Delivering an experience-first, AI-Native Network pivots on the creativity and commitment of our people. It requires a consistent and committed practice, something we call the Juniper Way. Job Description for an ASIC Physi

Senior ASIC Design EngineerJob Title - Senior ASIC Design Engineer

ApolisCompany Name - Apolis

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San Jose, California, USA

Full-time, Contract

Job Title: Senior ASIC Design Engineer Location:San Jose ,CA Contract: 12+ MonthsWhat candidate will Be Doing: Technical: Being a member of design team who oversees fullchip SDCs and works with physical design and DFT teams to close fullchip timing in multiple timing modes. Option to also do block level RTL design or block or top-level IP integration. Helping develop efficient methodology to promote block level SDCs to fullchip, and to bring fullchip SDC changes back to block level. Helping deve

ASIC / FPGA EngineerJob Title - ASIC / FPGA Engineer

ApolisCompany Name - Apolis

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Cedar Rapids, Iowa, USA

Full-time, Contract

Job Title: ASIC / FPGA Engineer Location: Cedar Rapids, IA (5 days onsite) Contract: 12+ Months Experience range - 6-15 years* Requirements capture, ASIC / FPGA digital architecture and design using RTL, timing closure, verification, and system integration * Recommend new tools and practices for continuous improvement in the group's ASIC / FPGA design flow * Contribute to engineering estimates for new program pursuits. * May provide technical leadership for project design teams by breaking down

ASIC Design EngineerJob Title - ASIC Design Engineer

Yochana IT SolutionsCompany Name - Yochana IT Solutions

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Santa Clara, California, USA

Third Party, Contract

ASIC Design Engineer Location: Santa Clara, CA Onsite Contract Overview of the Role As an ASIC Design Engineer , you will play a crucial role in the development and optimization of our cutting-edge ASIC solutions. Your work will directly impact the efficiency, performance, and scalability of our products, driving forward the company's objectives and contributing to technological innovations that shape the industry. Detailed Responsibilities Run and manage Fusion Compiler, ICC II, and Innovus

ASIC and/or FPGA Design & Verification Engineer (Lead, Senior or Principal)Job Title - ASIC and/or FPGA Design & Verification Engineer (Lead, Senior or Principal)

Boeing CompanyCompany Name - Boeing Company

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Tukwila, Washington, USA

Full-time

ASIC and/or FPGA Design & Verification Engineer (Lead, Senior or Principal) Company: The Boeing Company Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC and/or FPGA Design and Verification Engineers (Lead, Senior or Principal) to join us as part of our Boeing Electronic Products team at the heart of Boeing's products; ASICs and FPGAs in Tukwila or Kent, WA. From complex digitally beamformed phased arrays for constellation satellite programs to computi

ASIC and/or FPGA Design & Verification Engineer (Lead, Senior or Principal)Job Title - ASIC and/or FPGA Design & Verification Engineer (Lead, Senior or Principal)

Boeing CompanyCompany Name - Boeing Company

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Huntington Beach, California, USA

Full-time

ASIC and/or FPGA Design & Verification Engineer (Lead, Senior or Principal) Company: The Boeing Company Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC and/or FPGA Design and Verification Engineers (Lead, Senior or Principal) to join us as part of our Boeing Electronic Products team at the heart of Boeing's products; ASICs and FPGAs in Huntington Beach or El Segundo, CA. From complex digitally beamformed phased arrays for constellation satellite prog

ASIC/FPGA Design and Verification Engineer (Experienced, Lead or Senior)Job Title - ASIC/FPGA Design and Verification Engineer (Experienced, Lead or Senior)

Boeing CompanyCompany Name - Boeing Company

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Tukwila, Washington, USA

Full-time

ASIC/FPGA Design and Verification Engineer (Experienced, Lead or Senior) Company: The Boeing Company Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for an ASIC and/or FPGA Design and Verification Engineer (Experienced, Lead or Senior) to join us as part of our Boeing Electronic Products team at the heart of Boeing's products; ASICs and FPGAs in Kent or Tukwila, WA. Our site enjoys every other Friday off a part of our 9/80 flexible schedule! We also get to enjoy 4+ we

ASIC and/or FPGA Design and Verification Engineer (Entry Level, Associate or Mid-Level)Job Title - ASIC and/or FPGA Design and Verification Engineer (Entry Level, Associate or Mid-Level)

Boeing CompanyCompany Name - Boeing Company

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Fairfax, Virginia, USA

Full-time

ASIC and/or FPGA Design and Verification Engineer (Entry Level, Associate or Mid-Level) Company: The Boeing Company Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC and/or FPGA Design and Verification Engineers (Entry Level, Associate or Mid-Level) to join us as part of our Boeing Electronic Products team at the heart of Boeing's products; ASICs and FPGAs in Fairfax, VA. From complex digitally beamformed phased arrays for constellation satellite progr

ASIC and/or FPGA Design & Verification Engineer (Lead, Senior or Principal)Job Title - ASIC and/or FPGA Design & Verification Engineer (Lead, Senior or Principal)

Boeing CompanyCompany Name - Boeing Company

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Fairfax, Virginia, USA

Full-time

ASIC and/or FPGA Design & Verification Engineer (Lead, Senior or Principal) Company: The Boeing Company Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC and/or FPGA Design and Verification Engineers (Lead, Senior or Principal) to join us as part of our Boeing Electronic Products team at the heart of Boeing's products; ASICs and FPGAs in Fairfax, VA. From complex digitally beamformed phased arrays for constellation satellite programs to computing and n

Asic Manager, Design VerificationJob Title - Asic Manager, Design Verification

Meta Platforms, Inc. (f/k/a Facebook, Inc.)Company Name - Meta Platforms, Inc. (f/k/a Facebook, Inc.)

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Sunnyvale, California, USA

Full-time

Meta Platforms, Inc. (f/k/a Facebook, Inc.) has the following positions in Sunnyvale, CA Asic Manager, Design Verification: Work with researchers and architects defining verification plans for each of the different core IP. (ref. code REQ-2502-147199: $272,316/year - $287,650/year). Individual pay is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base salary only, and do not include bonus or equity or sales incentives, if a

ASIC & FPGA EngineerJob Title - ASIC & FPGA Engineer

Sun Technologies,Inc.Company Name - Sun Technologies,Inc.

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Remote

Contract

Job Title: ASIC & FPGA Engineer Duration: up to 12 months contract (with the possibility of extension) Location: Remote Work / Work from Home Pay Range: $85 - $90/hr on W2 Featured Benefits: Medical Insurance in compliance with the ACA401(k)Sick leave in compliance with applicable state, federal, and local laws Job Description: Responsible for ASIC & FPGA developmentExperience in developing, testing, and integrating FPGA platformsCollaboration with Software Engineers and other ASIC/FPGA engine

ASIC Timing EngineerJob Title - ASIC Timing Engineer

SmksoftCompany Name - Smksoft

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San Jose, California, USA

Contract

Job Title: Chip-Level Timing Constraint Development EngineerLocation: San Jose, CA - You must be already located in the San Jose area. Duration: 12+ MonthsVisa: Open (No restrictions) Responsibilities: 5 years of experience Define, develop, and validate timing constraints (SDC) for complex chip-level ASIC designs Perform static timing analysis (STA) to ensure full timing coverage and closure Collaborate with RTL, architecture, and physical design teams on clock structures and design intent Opti

ASIC Package SI/PI EngineerJob Title - ASIC Package SI/PI Engineer

Datum Software, Inc.Company Name - Datum Software, Inc.

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San Jose, California, USA

Contract, Third Party

Job Description: ASIC Package SI/PI Engineer Location: San Jose, CA 100% Onsite ASIC Package Engineer SI/PI Responsibilities: Drive chip-package-system co-design by driving signal and power integrity requirements analysis and optimizationDefine power tree structure, netlists, etc for High Performance Computing based on 2.5D/3D package technologyRun pre-layout and post-layout simulation flow with a focus on high-speed interface and PDN, create simulation models and develop simulation methodology

ASIC EngineerJob Title - ASIC Engineer

AdientOne LLCCompany Name - AdientOne LLC

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California, USA

Contract

Role: ASIC Engineer Location: Clara CA 95054 OR Longmont CO 80503 Duration: 12+months Job Description: Responsible for the development of complex multi-mode / multi-corner timing constraints that are compatible for RTL and signoff Drive the pre-route timing checks and QoR clean up to eliminate SDC issues and ensure a quality handoff for STA checks Requires a mix of SDC knowledge, EDA tool competence and Tcl based scripting capability (in both EDA environment and standalone Linux Tcl shell scrip

Senior ASIC Engineer - DFXJob Title - Senior ASIC Engineer - DFX

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Santa Clara, California, USA

Full-time

We are now looking for a Senior ASIC Engineer in the area of DFX ATPG flows and methodologies. Do you like to think creatively and enjoy solving challenges that require innovation? If so, we may have an opportunity for you. In our team we define and build methodologies, Software, and flows tailored to the field of Silicon device testing, Silicon debug, and Silicon failure analysis. We owe our success to our people, some of the brightest in the world, and a company culture that fosters and encour

ASIC/FPGA Design Engineer, 5+ YearsJob Title - ASIC/FPGA Design Engineer, 5+ Years

Lockheed MartinCompany Name - Lockheed Martin

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Denver, Colorado, USA

Full-time

Job ID: 690256BR Date posted: Apr. 08, 2025 Description:Join Our Team as an ASIC & FPGA Design Engineer where you will support over 50 different programs and research and development (R&D) efforts, affecting technology across military space, civil space, commercial space, missiles, missile defense platforms, satellite surveillance platforms, deep space exploration, and manned flight missions. Location: This position does not support teleworking; the preferred candidate will be located near our

Advanced ASIC FPGA Engineer for Crypto & Cross Domain Solutions [sign-on bonus]Job Title - Advanced ASIC FPGA Engineer for Crypto & Cross Domain Solutions [sign-on bonus]

General DynamicsCompany Name - General Dynamics

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Scottsdale, Arizona, USA

Full-time

Basic Qualifications Bachelor's degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field, plus a minimum of 5 years of relevant experience; or Master's degree plus a minimum of 3 years of relevant experience. CLEARANCE REQUIREMENTS: Department of Defense Secret security clearance is required at time of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified