asic Jobs

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Senior SOC/ASIC Verification EngineerJob Title - Senior SOC/ASIC Verification Engineer

GAC Solutions Inc.Company Name - GAC Solutions Inc.

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Phoenix, Arizona, USA

Full-time, Part-time, Contract, Third Party

Role: Senior SOC/ASIC Verification Engineer Location: Arizona - Onsite Contract We're seeking an experienced Design Verification Engineer with 8 10 years of hands-on expertise in SystemVerilog/UVM, EDA tools (Synopsys/Cadence), and scripting (Python, TCL, Perl). Must have experience in functional verification, assertions, and emulation, with a strong track record in ASIC development. Background in verifying GPU/CPU, high-speed interfaces (PCIe, DDR), or data center applications is a plus.

Senior ASIC Design Engineer (eInfochips Inc)Job Title - Senior ASIC Design Engineer (eInfochips Inc)

Arrow Electronics, Inc.Company Name - Arrow Electronics, Inc.

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San Jose, California, USA

Full-time

Position: Senior ASIC Design Engineer (eInfochips Inc) Job Description: What candidate will Be Doing: Map multi-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds, and testbenches to simulate FPGA components.Establish prototyping systems in the lab and contribute to defining, evolving, and supporting our prototyping methodology.Option to engage in block-level RTL design or block or top-level IP integration.Collaborate with Software, Design, and Verific

Senior ASIC Hardware EngineerJob Title - Senior ASIC Hardware Engineer

BlackFern RecruitmentCompany Name - BlackFern Recruitment

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Cambridge, Massachusetts, USA

Full-time

Security clearance: Applicants selected for this position will be required to obtain and maintain a government security clearance. Role: A Senior ASIC Hardware Engineer specifies, designs, verifies, tests, and documents Application-Specific Integrated Circuits. The engineer develops the architecture, designs circuits and/or HDL, performs simulations, performs physical layout, verifies and tests designs. Job Description: Duties/Responsibilities Design and simulate circuits at transistor-level to

ASIC Engineer, Design VerificationJob Title - ASIC Engineer, Design Verification

Meta Platforms, Inc. (f/k/a Facebook, Inc.)Company Name - Meta Platforms, Inc. (f/k/a Facebook, Inc.)

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Remote

Full-time

Meta Platforms, Inc. (f/k/a Facebook, Inc.) has the following positions in Menlo Park, CA ASIC Engineer, Design Verification: Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification and develop functional tests based on verification test plan. Telecommute from anywhere in the U.S. permitted. (ref. code REQ-2506-152460: $238,228/year - $287,650/year). Individual pay is determined by skills, qualifications, experience, and loca

ASIC Microarchitect EngineerJob Title - ASIC Microarchitect Engineer

APN Software Services, IncCompany Name - APN Software Services, Inc

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Irvine, California, USA

Full-time

Please contact Abdul on "" OR email me at "" Job Summary: As an ASIC Microarchitect, you will play a key role in designing and implementing state-of-the-art digital systems, SoCs, and high-performance RISC-V cores. You will collaborate closely with systems, software, and hardware design teams, as well as the physical implementation team, to architect microarchitectures that optimize power, performance, and area (PPA). We are looking for an innovative thinker who balances pragmatic engineering so

ASIC EngineerJob Title - ASIC Engineer

AdientOne LLCCompany Name - AdientOne LLC

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California, USA

Contract

Role: ASIC Engineer Location: Clara CA 95054 OR Longmont CO 80503 Duration: 12+months Job Description: Responsible for the development of complex multi-mode / multi-corner timing constraints that are compatible for RTL and signoff Drive the pre-route timing checks and QoR clean up to eliminate SDC issues and ensure a quality handoff for STA checks Requires a mix of SDC knowledge, EDA tool competence and Tcl based scripting capability (in both EDA environment and standalone Linux Tcl shell scrip

Senior ASIC Design Engineer- Emulation (HAPS Engineer)Job Title - Senior ASIC Design Engineer- Emulation (HAPS Engineer)

CloudiousCompany Name - Cloudious

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San Jose, California, USA

Contract

Position: Senior ASIC Design Engineer- Emulation (HAPS Engineer) Location: San Jose, CA (Complete onsite) Experience: 8+ years (Relevant) What candidate will Be Doing: Map multi-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds, and testbenches to simulate FPGA components. Establish prototyping systems in the lab and contribute to defining, evolving, and supporting our prototyping methodology. Option to engage in block-level RTL design or block or top

Firmware EngineerJob Title - Firmware Engineer

Seneca Resources, LLCCompany Name - Seneca Resources, LLC

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Austin, Texas, USA

Contract

JOB DESCRIPTION Role: Firmware Engineer Location: Austin TX Onsite Position Status: W2 Job Summary Key Responsibilities: Execution of tests and test scripts in manual and automated environments on silicon test platforms Test script development and execution for pre and post-silicon firmware environment using Python Developing and maintaining automated test framework Development and testing of firmware designed for an embedded microcontroller in C Debugging and supporting of IP hardware an

ASIC Engineer, Formal VerificationJob Title - ASIC Engineer, Formal Verification

VeearCompany Name - Veear

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Sunnyvale, California, USA

Contract

Requirements: Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.5+ years of experience in Formal VerificationExperience with Formal Verification applications including Datapath, sequential equivalence, Xprop, Clock Gating, connectivity etcProven understanding of Formal Verification methodologies, complexity reduction techniques and abstraction techniquesProven analytical skills to craft Client solutions to tackle industry-le

Sr ASIC/FPGA VHDL Design Engineer Secret Clearance Required No Sponsorship AvailableJob Title - Sr ASIC/FPGA VHDL Design Engineer Secret Clearance Required No Sponsorship Available

ZoeTech Staffing LLCCompany Name - ZoeTech Staffing LLC

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Camden, New Jersey, USA

Full-time

Schedule: 9/80 Regular with every other Friday off Job Description: Reporting to the Manager, Engineering (ASIC/FPGA), the Senior Member of Engineering Staff (SMES) will be part of the key ASIC/FPGA design team, responsible for the delivery of FPGA/ASICs for high-speed crypto applications. S/he will architect, implement high speed crypto architectures, on ASICs/Xilinx Zynq/MPSOC class FPGAs, with hands on design/debug with Ethernet, TCP/IP protocols. The company has state-of-the-art EDA flows/

ASIC/RTL Design Engineer - Senior at San Jose, CAJob Title - ASIC/RTL Design Engineer - Senior at San Jose, CA

Infobahn Softworld Inc.Company Name - Infobahn Softworld Inc.

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Santa Clara, California, USA

Contract, Third Party

TOP 3 SKILLS: Good understanding of SystemVerilog, analyzing existing designs and making modifications, able to understand tools used by ASIC engineers like Lint, CDC, STA, etc. - scripting is nice to have KEY RESPONSIBILITIES: Write micro-architecture documentation and own major portions of the design and implementation of blocks to meet functional, timing, area, and power requirements. Collaborate with architecture and hardware teams to understand the requirements. Work with verification and p

Lead RFIC ASIC Design EngineerJob Title - Lead RFIC ASIC Design Engineer

Everest Consultants, IncCompany Name - Everest Consultants, Inc

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Hillsboro, Oregon, USA

Full-time

Title: Lead RFIC ASIC Design Engineer Duration: Permanent, Full-time Location: Hillsboro, OR (Hybrid: onsite 3 days per week) Salary Range: $160,000 to $225,000 per year **Candidates must have valid U.S. work authorization at the time of hire. Our client, a leader in the test-and-measurement and wireless communications industries, is seeking passionate individuals with a vision for the future, a desire to impact the world, and a drive to bring innovative ideas to life. They are building develop

Senior Manager / ASIC STA & CAD EngineeringJob Title - Senior Manager / ASIC STA & CAD Engineering

Coretek LabsCompany Name - Coretek Labs

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Longmont, Colorado, USA

Contract, Third Party

Job Title: ASIC STA & CAD Engineering Location: Longmont, Colorado (Hybrid) Duration: Long Term Contract Domain: Engineering Key Responsibilities: Developing block and SoC timing constraints, full chip STA setup and signoff of multi-corner multi-voltage designs. Owning timing flow and execution to meet SoC timing requirements including timing budgeting, repeater planning, constraints/exceptions generation and management Engaging closely with block and SoC design teams to understand the design

Senior ASIC Timing EngineerJob Title - Senior ASIC Timing Engineer

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Remote or Santa Clara, California, USA

Full-time

Come be a part of new process technology adoption by joining NVIDIA's Advanced Technology Group! Work as part of the advanced technology team to optimize design tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior ASIC Timing Engineer to join our dynamic and growing team! If you are problem solver and highly motivated individual searching for a collaborative and exciting role, join us today. We encourage applicants with a history of proven success working in

Senior Reset and Boot ASIC EngineerJob Title - Senior Reset and Boot ASIC Engineer

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Remote or Santa Clara, California, USA

Full-time

NVIDIA is looking for a Senior Reset and Boot ASIC Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 fueled the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a "learning machine" that constantly evolves by adapting to new opportunities that are hard to pursue, that o

ASIC Implementation EngineerJob Title - ASIC Implementation Engineer

Broadcom CorporationCompany Name - Broadcom Corporation

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San Jose, California, USA

Full-time

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Job Description: ASIC implementation engineer with demonstrated expertise in multiple disciplines including synthesis, design for test, floorplanning, place and route, clock methodology, power planning and analysis, timing closure, signal integrity and

ASIC Hardware Design Engineer - New College Grad 2025Job Title - ASIC Hardware Design Engineer - New College Grad 2025

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Austin, Texas, USA

Full-time

NVIDIA has been redefining computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's motivated by great technology-and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent.

Memory Sub-System ASIC EngineerJob Title - Memory Sub-System ASIC Engineer

Qualcomm TechnologiesCompany Name - Qualcomm Technologies

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San Diego, California, USA

Full-time

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. The infrastructure IP Team consists of a multi-disciplinary group involved in the definition and design of Platform infrastructure HW compon

Senior Director, ASIC, Silicon & Systems TechnologiesJob Title - Senior Director, ASIC, Silicon & Systems Technologies

Juniper NetworksCompany Name - Juniper Networks

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Sunnyvale, California, USA

Full-time

At Juniper, we believe the network is the single greatest vehicle for knowledge, understanding, and human advancement the world has ever known. To achieve real outcomes, we know that experience is the most important requirement for networking teams and the people they serve. Delivering an experience-first, AI-Native Network pivots on the creativity and commitment of our people. It requires a consistent and committed practice, something we call the Juniper Way. Job Summary Juniper Networks is

ASIC Verification EngineerJob Title - ASIC Verification Engineer

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Austin, Texas, USA

Full-time

NVIDIA is seeking an outstanding ASIC Verification Engineer to verify the design and implementation of the world's leading SoC's and GPU's. This position offers the opportunity to have a real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible