ip Jobs in san jose, ca

241 - 260 of 337 Jobs

Senior Network Engineer (Wireless)Job Title - Senior Network Engineer (Wireless)

CopelandCompany Name - Copeland

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Remote or St. Louis, Missouri, USA

Full-time

About Us We are a global climate technologies company engineered for sustainability. We create sustainable and efficient residential, commercial and industrial spaces through HVACR technologies. We protect temperature-sensitive goods throughout the cold chain. And we bring comfort to people globally. Best-in-class engineering, design and manufacturing combined with category-leading brands in compression, controls, software and monitoring solutions result in next-generation climate technology th

Senior Cloud Network Engineer 2 (Remote)Job Title - Senior Cloud Network Engineer 2 (Remote)

PublixCompany Name - Publix

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Remote or Lakeland, Florida, USA

Full-time

Publix Super Markets, Inc. is the largest privately-owned food retailer in the nation with more than 1,200 stores and more than 200,000 associates throughout the Southeast. We are associate-owned, proud of our family atmosphere, and consistently named as one of the best companies to work for in America. We are largely debt-free and renowned for our financial performance as well as our premier customer service. Publix?s Information Services (I/S) department is located in Lakeland, Florida and Alp

CAD/EDA Silicon Design/Verification Infrastructure EngineerJob Title - CAD/EDA Silicon Design/Verification Infrastructure Engineer

Datum Software, Inc.Company Name - Datum Software, Inc.

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Santa Clara, California, USA

Full-time

Position Title: CAD/EDA Silicon Design/Verification Infrastructure Engineer Location: Santa Clara, CA Term: Possible 3-Month Contract-to-Hire (CTH) Job Description: We are seeking a CAD/EDA Silicon Design/Verification Infrastructure Engineer with strong experience in SoC/IP design and verification infrastructure. The ideal candidate will have hands-on expertise in Python, SystemVerilog/UVM, and working in Linux-based environments. Minimum Qualifications: 5+ years of experience in EDA/CAD for SoC

Design Verification EngineerJob Title - Design Verification Engineer

Avance ConsultingCompany Name - Avance Consulting

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Mountain View, California, USA

Contract

Job Description Strong understanding of SV and UVM and good debugging skills. Understanding of AMBA protocols. Understand design specs and develop test plans based on functional and architectural requirements Build UVM/System Verilog-based verification environments for IP/subsystem/SoC level testing Develop directed and random testcases, perform coverage analysis, and close functional/code coverage Debug simulation failures and work closely with RTL designers to resolve issues Execute regressio

Automation Developer (Python Automation + AI)Job Title - Automation Developer (Python Automation + AI)

E-Solutions, Inc.Company Name - E-Solutions, Inc.

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Mountain View, California, USA

Third Party, Contract

Location: Mountain View, CA Job Overview: We are seeking a skilled Software Engineer to join our team in developing robust automation solutions. This role involves designing and implementing workflows, approval mechanisms, analytics dashboards, and notification systems using Python. Familiarity with IP version differences is a plus. Key Responsibilities: Develop and maintain automation workflows using Python Create analytics dashboards and custom notification systems Collaborate with cross-funct

Network Operations EngineerJob Title - Network Operations Engineer

Tranzeal, Inc.Company Name - Tranzeal, Inc.

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Remote or Santa Clara, California, USA

Contract

Role : Network Operations Santa Clara, CA / Onsite / Hybrid / RemoteW2 ONLY Must-have extensive hands on experience with BGP, EVPN and VXLAN. Experience in designing, configuring, and implementing enterprise-class network solutions using Cisco, Arista and Mellanox hardware. Expert level knowledge of troubleshooting, implementing, optimizing and testing of dynamic routing protocols such as EIGRP, OSPF, BGP and ability to interpret and resolve complex route table problem. Knowledge of EVPN & VXLAN

BMP Test Engineer -Board Mounted PowerJob Title - BMP Test Engineer -Board Mounted Power

Recruitment.aiCompany Name - Recruitment.ai

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San Jose, California, USA

Full-time

Job Type: W2 only Job Title: BMP Test Engineer -Board Mounted Power Location: San Jose, CA (Onsite) Job Description: As a board mounted power test engineer, you will test and qualify highly reliable Board-Mounted Power (BMP) Systems for networking products. These products range from 10W IP-phones to 3000W+ Data Center and Service Provider switches and routers. This individual will perform both routine board mounted power test qualifications in our hardware team lab as well as any specialized tes

Employee Benefits SpecialistJob Title - Employee Benefits Specialist

Radiant System, IncCompany Name - Radiant System, Inc

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Mountain View, California, USA

Contract

Title: Benefits Specialist Location: 690 East Middlefield Rd. Buildings 1,2,8 Mountain View CA USA 94043 Duration: 12+ Months Position Summary: We Are: At Client, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform th

Analog Layout Engineer x3Job Title - Analog Layout Engineer x3

Datum Software, Inc.Company Name - Datum Software, Inc.

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Santa Clara, California, USA

Third Party, Contract

Position: Analog Layout Design Engineer Location: Santa Clara, CA Contract Type: 3-Month Contract-to-Hire Responsibilities: Perform layout of cutting-edge, high-performance, high-speed CMOS ICs in mature foundry nodes (40nm, 55nm, 65nm, 130nm).Collaborate with circuit designers to review and analyze floorplans and complex circuits.Run full sets of design verification tools for AMS blocks.Interpret LVS, DRC, and ERC reports to expedite layout closure.Use advanced CAD tools and mask design experti

Sr SoC Gate-Level Simulation (GLS) EngineerJob Title - Sr SoC Gate-Level Simulation (GLS) Engineer

Yoh - A Day & Zimmerman CompanyCompany Name - Yoh - A Day & Zimmerman Company

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Remote or Santa Clara, California, USA

Full-time

Sr SoC Gate-Level Simulation (GLS) Engineer In need of a solid Gate-Level Simulation Engineer to support complex System-on-Chip (SoC) development. In this contract role, you ll be responsible for verifying gate-level functionality, timing, and power across SoC subsystems. You'll work closely with RTL, physical design, and verification teams to ensure accurate coverage and system-level stability. Scope: Develop and apply GLS methodologies for high-performance SoC projects Run gate-level simulati

Senior Front-End ASIC EngineerJob Title - Senior Front-End ASIC Engineer

DivTek Global Solutions Inc.Company Name - DivTek Global Solutions Inc.

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San Jose, California, USA

Full-time

Job Title: Senior Front-End ASIC Engineer Job Location: San Jose, CA (Hybrid) Benefits: Excellent PTO, full benefits, 401(k), hybrid schedule, great team culture Job Type: Full-Time, Permanent About Company: This is a full-time role, directly employed position through the client. Work Schedule Type: This is a hybrid position Relocation: Relocation assistance available Job Description Our client is seeking a Senior Front-End ASIC Engineer to join their elite engineering team. This is a unique op

Emulation EngineerJob Title - Emulation Engineer

eInfochips IncCompany Name - eInfochips Inc

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San Jose, California, USA

Full-time, Third Party

Job Description:What candidate will Be Doing: Map multi-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds, and testbenches to simulate FPGA components.Establish prototyping systems in the lab and contribute to defining, evolving, and supporting our prototyping methodology.Option to engage in block-level RTL design or block or top-level IP integration.Collaborate with Software, Design, and Verification teams to validate the functional and performance obj

GPU Software EngineerJob Title - GPU Software Engineer

Xoriant CorporationCompany Name - Xoriant Corporation

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San Jose, California, USA

Contract

Job Title: GPU Software Engineer Location: San Jose, CA Duration: 6+ months contract (Long Term) Roles and Responsibilities: As a GPU Software Engineer, you will be equipped to develop GPU IP from the early Architectural planning process until we productize and ship millions of devices to consumers.You will be responsible for becoming a domain expert in at least one project area, and gaining knowledge and competencies for developing new features and debugging any customer issues related to you

RTL EngineerJob Title - RTL Engineer

CloudiousCompany Name - Cloudious

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Santa Clara, California, USA

Contract

Title: RTL Engineer Location: Santa Clara, CA (Day-1 onsite) Duration: 6 Months Role: Integrate RISC-V Core to SoC Key Responsibilities Integrate RISC-V CPU cores into SoC designs, collaborating with cross-functional teams (DV, physical design, architecture, verification, and post-silicon validation) to ensure seamless delivery. Develop and optimize RTL (using Verilog/SystemVerilog) for core, interconnect, and memory subsystems. Evaluate and integrate third-party IP, ensuring performance, power,

STAEngineerJob Title - STAEngineer

CloudiousCompany Name - Cloudious

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San Jose, California, USA

Contract

Position: STA Engineer Location: San Jose CA (Day-1 Onsite) Must have/Primary skills: Fullchip timing, SDC changes back to block level, Block/Full chip SDC development, Static Timing Analysis, Primetime/Tempus What You'll Be Doing: Being a member of design team who oversees fullchip SDCs and works with physical design and DFT teams to close fullchip timing in multiple timing modes. Option to also do block level RTL design or block or top-level IP integration. Helping develop efficien

Senior ASIC Design Engineer- Emulation (HAPS Engineer)Job Title - Senior ASIC Design Engineer- Emulation (HAPS Engineer)

CloudiousCompany Name - Cloudious

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San Jose, California, USA

Contract

Position: Senior ASIC Design Engineer- Emulation (HAPS Engineer) Location: San Jose, CA (Complete onsite) Experience: 8+ years (Relevant) What candidate will Be Doing: Map multi-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds, and testbenches to simulate FPGA components. Establish prototyping systems in the lab and contribute to defining, evolving, and supporting our prototyping methodology. Option to engage in block-level RTL design or block or top

Network Design EngineerJob Title - Network Design Engineer

Innominds SoftwareCompany Name - Innominds Software

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Mountain View, California, USA

Full-time

Please find the below opportunity and let me know your interest. Location: Mountain View, CA Duration: Long Term SUMMARY: Specify & Design network infrastructure including routers, switches, and firewalls. Design technical specifications for IP addressing, subnets & VLANs Design technical specifications for networking redundancies using VRRP, BGP and OSPF. Design technical specifications for Layer 2 technologies like Link Aggregation (LAG) and LACP. Design virtual networking solutions across on-

Principal Digital Design EngineerJob Title - Principal Digital Design Engineer

OSI Engineering, Inc.Company Name - OSI Engineering, Inc.

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San Jose, California, USA

Full-time

Principal Digital Design Engineer A premier chip and silicon IP provider focused on accelerating and securing data is seeking an exceptional Principal Digital Design Engineer to join its Memory Interface Chip (MIC) team in San Jose, CA. This is an exciting opportunity to work alongside some of the industry s most innovative engineers on cutting-edge technology that drives faster and more secure data solutions. In this full-time role, the Principal Digital Design Engineer will report directly to

SDC EngineerJob Title - SDC Engineer

eInfochips IncCompany Name - eInfochips Inc

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San Jose, California, USA

Full-time

Position: SDC Engineer (eInfochips Inc) Location: San Jose CA (Day-1 Onsite) Must have/Primary skills: Fullchip timing, SDC changes back to block level, Block/Full chip SDC development, Static Timing Analysis, Primetime/Tempus What You'll Be Doing: Being a member of design team who oversees fullchip SDCs and works with physical design and DFT teams to close fullchip timing in multiple timing modes.Option to also do block level RTL design or block or top-level IP integration.Helping develop effi

Senior Staff Wireless Development EngineerJob Title - Senior Staff Wireless Development Engineer

StrykerCompany Name - Stryker

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San Jose, California, USA

Full-time

Work Flexibility: Hybrid What You Will Do: We're seeking a highly experienced Senior Staff Wireless Engineer to drive architectural innovation and solve complex system-level challenges in our wearables products. You'll work closely with senior leaders in audio, speech, and RF domains to solve complex system-level challenges and develop cutting-edge wireless solutions that shape the future of our products. Design and develop wireless communications systems for wearable products, focusing on 802.