principal asic designer Jobs in 95051

21 - 40 of 72 Jobs

ASIC Power EngineerJob Title - ASIC Power Engineer

Apple, Inc.Company Name - Apple, Inc.

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Cupertino, California, USA

Full-time

Summary Would you like to join Apple's growing wireless silicon development team? Our wireless SOC organization is responsible for all aspects of wireless silicon development with a particular emphasis on highly energy efficient / low power design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC/Power architecture and design, VLS

ASIC/RTL Design Engineer job opportunity at Santa Clara, CA / Longmont, Colorado (Onsite/Hybrid)Job Title - ASIC/RTL Design Engineer job opportunity at Santa Clara, CA / Longmont, Colorado (Onsite/Hybrid)

Infobahn Softworld Inc.Company Name - Infobahn Softworld Inc.

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Santa Clara, California, USA

Contract

Role Title: ASIC/RTL Design Engineer - Senior Location: Santa Clara, CA / Longmont, Colorado (Onsite/Hybrid) Duration: 12+ months contract DESCRIPTION: Responsible for the development of complex multi-mode / multi-corner timing constraints that are compatible for RTL and signoff Drive the effort to maintain RTL quality metrics in complex, hierarchical designs and automating that process for improved efficiency. Drive the pre-route timing checks and QoR clean up to eliminate SDC issues and ens

Principal Hardware Systems Design ENgineerJob Title - Principal Hardware Systems Design ENgineer

Oxford Global ResourcesCompany Name - Oxford Global Resources

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Fremont, California, USA

Contract

Title: Principal Systems Hardware Design Engineer Location: Valencia, CA, Onsite (Possible hybrid -3 days on T,W,Th) Length: 12 months + (multi-year or potential conversion to perm down the road) Hours: 40 hours per week Start date: Middle of June (some flex) background check/drug screen required. Interview Process: 2 rounds, National is virtual, Final round is onsite. Skills: Proficient in ASIC development with the ability to integrate this expertise within systems teams. Multi-layered boards,

Hardware Systems Integration Engineer (PCIe gen4+, Firmware exp.)Job Title - Hardware Systems Integration Engineer (PCIe gen4+, Firmware exp.)

Oxford Global ResourcesCompany Name - Oxford Global Resources

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Milpitas, California, USA

Contract

Position Title: PCIe Hardware Systems Integration Engineer (Firmware, PCI-e gen 4 or later exp.) Location: Onsite in Milpitas, CA may be some flexibility for hybrid but initially will need to be onsite all 5 days, especially during integration phases. Length: 6 months -contract to hire Looking for someone to go perm. Process: 2 screening virtual interview and final on-site interview. Ideal Start Date: July 1th or later - Potential to start sooner Background check and Drug Screen: Both Required S

SoC Power Model EngineerJob Title - SoC Power Model Engineer

Apple, Inc.Company Name - Apple, Inc.

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Cupertino, California, USA

Full-time

Summary Do you want to utilize your engineering background to make big things happen? Can you influence, connect, get results and communicate effectively? Can you deliver on a predictable and dynamic schedule? Do you have a passion for crafting entirely new solutions? Do you love building without precedent?As part of our Digital Design Engineering group, you'll take imaginative and revolutionary ideas and determine how to turn them into reality. You and your team will apply engineering fundamen

Senior DFT EngineerJob Title - Senior DFT Engineer

Qualcomm TechnologiesCompany Name - Qualcomm Technologies

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Santa Clara, California, USA

Full-time

Company:Qualcomm Atheros, Inc. Job Area:Engineering Group, Engineering Group > ASICS Engineering General Summary: The Digital ASIC Design Team is currently seeking candidates who will be responsible for the implementation and verification of DFT/DFD (Design for Test/Design for Debug) techniques for low power, multi voltage designs. The candidate should have solid hands-on experience with industry standard DFT techniques such as scan and MBIST. Job responsibilities include DFT pattern generati

SoC Power Model EngineerJob Title - SoC Power Model Engineer

Apple, Inc.Company Name - Apple, Inc.

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Cupertino, California, USA

Full-time

iPhone Touch Sensing ArchitectJob Title - iPhone Touch Sensing Architect

Apple, Inc.Company Name - Apple, Inc.

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Cupertino, California, USA

Full-time

Summary The goal of the iPhone Touch Sensing Technology team is to enable the world's best User Experiences through state-of-the-art sensing solutions. The team designs, develops, and delivers high-precision, low-latency MultiTouch solutions that are the gold standard in the smartphone/mobile industries. As a Touch Sensing Architect, you'll play an integral role in conceiving, modeling, prototyping and integrating new sensor solutions for the iPhone. New challenges arise every day that require

SoC Pre-Silicon Engineering Program ManagerJob Title - SoC Pre-Silicon Engineering Program Manager

Apple, Inc.Company Name - Apple, Inc.

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Cupertino, California, USA

Full-time

Summary Imagine what you could do here. At Apple, new insights have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also appli

Sr. RTL Design EngineerJob Title - Sr. RTL Design Engineer

Infobahn Softworld Inc.Company Name - Infobahn Softworld Inc.

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Santa Clara, California, USA

Third Party, Contract

Location: San Jose, CA - Hybrid (at least 3 days a week) KEY RESPONSIBILITIES: Microarchitecture development of IP subsystems Perform RTL design of digital components. Work with functional verification team to meet coverage and quality standards. Analyze/fix Lint and CDC errors of the components. Guarantee quality/timely deliverables meeting project's schedule. Help to improve/automate design process. Support post-silicon product bring-up/debug. PREFERRED EXPERIENCE: 10 years' experience in RTL

ASIC Design Verification Engineer (Santa Clara, CA)Job Title - ASIC Design Verification Engineer (Santa Clara, CA)

Qualcomm TechnologiesCompany Name - Qualcomm Technologies

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Santa Clara, California, USA

Full-time

Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group > ASICS Engineering General Summary: Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This i

ASIC Design EngineerJob Title - ASIC Design Engineer

Apple, Inc.Company Name - Apple, Inc.

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Cupertino, California, USA

Full-time

Summary As an ASIC Design Engineer, the individual's primary responsibility will be RTL design. This will include chip architecture definition, block/function definition, specification, design, simulation and unit level verification of digital functions on Mixed Signal ASICs. Key Qualifications Proven track-record in digital design including RTL design experienceStrong understanding of digital design flow including RTL simulation, logic synthesis, timing constraints, timing closure, STA, back

RTL Design Engineer - Senior - HybridJob Title - RTL Design Engineer - Senior - Hybrid

VIVA USA INCCompany Name - VIVA USA INC

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Santa Clara, California, USA

Contract

Title: RTL Design Engineer - Senior Description: KEY RESPONSIBILITIES: Microarchitecture development of IP subsystems Perform RTL design of digital components. Work with functional verification team to meet coverage and quality standards. Analyze/fix Lint and CDC errors of the components. Guarantee quality/timely deliverables meeting project s schedule. Help to improve/automate design process. Support post-silicon product bring-up/debug. PREFERRED EXPERIENCE: 10 years' experience in RTL coding K

PHY Design Verification EngineerJob Title - PHY Design Verification Engineer

Apple, Inc.Company Name - Apple, Inc.

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Sunnyvale, California, USA

Full-time

Summary Would you like to join Apple's growing wireless silicon development team? Our wireless SOC organization is responsible for all aspects of wireless silicon development with a particular emphasis on highly energy efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and i

Digital Integration & Timing EngineerJob Title - Digital Integration & Timing Engineer

Apple, Inc.Company Name - Apple, Inc.

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Sunnyvale, California, USA

Full-time

Summary Come and join Apple's growing wireless silicon development team. Our Wireless SoC organization is responsible for all aspects of wireless silicon development, emphasizing highly energy-efficient design and new technologies that transform the user experience at the product level. This is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Veri

Senior Digital Integration & Timing EngineerJob Title - Senior Digital Integration & Timing Engineer

Apple, Inc.Company Name - Apple, Inc.

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Sunnyvale, California, USA

Full-time

Digital Integration & Timing EngineerJob Title - Digital Integration & Timing Engineer

Apple, Inc.Company Name - Apple, Inc.

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Sunnyvale, California, USA

Full-time

Touch ASIC Architect (Analog)Job Title - Touch ASIC Architect (Analog)

Apple, Inc.Company Name - Apple, Inc.

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Cupertino, California, USA

Full-time

Summary Design, develop, and launch next-generation Touch Technologies in Apple products!The Touch Technology team develops ground breaking Touch solutions and technologies that are central to Apple's products, including the iPhone, iPad, MacBooks, and more! The key goal of our team is to enable the world's best multi-touch user-experience. Our team features a collaborative and hands-on environment that fosters engineering excellence, creativity, and innovation. An ASIC Analog Architect within

Mobile Chipset EngineerJob Title - Mobile Chipset Engineer

Qualcomm TechnologiesCompany Name - Qualcomm Technologies

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Santa Clara, California, USA

Full-time

Company:Qualcomm Innovation Center, Inc. Job Area:Engineering Group, Engineering Group > ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document I

Staff SOC Physical Design EngineerJob Title - Staff SOC Physical Design Engineer

Qualcomm TechnologiesCompany Name - Qualcomm Technologies

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Santa Clara, California, USA

Full-time

Company:Qualcomm Atheros, Inc. Job Area:Engineering Group, Engineering Group > ASICS Engineering General Summary: A SOC Physical Design Engineer plays a crucial role in the development and implementation of products at Qualcomm. This role requires strong knowledge of physical design tools (like Cadence or Synopsys), semiconductor processes, and an understanding of timing closure, clock tree synthesis, power optimization, and physical verification methodologies. Additionally, communication ski