tcl Jobs in san jose, ca

41 - 60 of 66 Jobs

FPGA Engineer - RemoteJob Title - FPGA Engineer - Remote

EndoSec LLCCompany Name - EndoSec LLC

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Remote

Full-time

The EndoSec FPGA Engineer is responsible for the design, development, testing, and maintenance of IP cores and FPGA-based systems used in hardware security applications. < class="md-end-block md-heading">Key Responsibilities FPGA Design and Development: Design and develop IP cores and FPGA configurations implementing the latest in leakage-resilient hardware cryptography algorithms using state-of-the-art FPGA hardware. Modeling and Simulation: Use simulation tools and verification frameworks to e

ASIC Physical Designers - IIIJob Title - ASIC Physical Designers - III

Infobahn Softworld Inc.Company Name - Infobahn Softworld Inc.

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Remote or Austin, Texas, USA

Contract, Third Party

Title : ASIC Physical Designers - Location : Austin, TX, 78746 Duration : 06 Months (possibility for extension) Job Description: 100% Remote with the option to be hybrid if in Austin, TX Laptop will be issued Job Title: VLSI Circuit Design and Physical Validation Description: The hire will be involved in deep sub-micron IC logic and VLSI, ASIC and Custom Design, with Intel's PROM IP for use in mobile, IOT, client, network, and server segments. We are looking for a skilled and motivated VLSI

Teamcenter AdministratorJob Title - Teamcenter Administrator

iTARKSCompany Name - iTARKS

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Remote

Contract

**Job Description: Teamcenter Administration** **Overview:** As a Teamcenter Administrator, you will be responsible for the administration, maintenance, and support of the Teamcenter PLM (Product Lifecycle Management) system. This role involves collaborating with various stakeholders to ensure the efficient operation of Teamcenter and its alignment with business objectives. **Key Responsibilities:** 1. **System Configuration and Customization:** - Configure and customize Teamcenter according t

Physical Design- Engineer (CAD flow)Job Title - Physical Design- Engineer (CAD flow)

HCL America Inc.Company Name - HCL America Inc.

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Sunnyvale, California, USA

Full-time

Physical Design- Engineer (CAD flow) Sunnyvale, CA - Strong aptitude for programming and automation. - Hands-on experience in development of end-2-end PD and sign-off flows from scratch supporting multiple EDA vendors and foundry nodes. - Proficiency in programming/scripting languages Python, YAML and TCL

RTL Design EngineerJob Title - RTL Design Engineer

SGS ConsultingCompany Name - SGS Consulting

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Santa Clara, California, USA

Contract

JOB DESCRIPTION: JOB DUTIES: Responsible for RTL design using Verilog HDL for implementation and debug. Read and comprehend System on Chip level architectural specification. Write microarchitecture specification for new and modified functions. Responsible for linting and simulation of design. Work with synthesis and backend teams for physical implementation.EDUCATION: Bachelor's or master s in computer engineeringKEY RESPONSIBILITIES: Perform RTL design of digital components in Verilog/system

Senior RTL Design EngineerJob Title - Senior RTL Design Engineer

ZealTech, Inc.Company Name - ZealTech, Inc.

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San Jose, California, USA

Contract

RTL Design Engineer - Senior Responsible for RTL design using Verilog HDL for implementation and debug. Read and comprehend System on Chip level architectural specification. Write microarchitecture specification for new and modified functions. Responsible for linting and simulation of design. Work with synthesis and backend teams for physical implementation. EDUCATION: Bachelor's or Master's in Computer Engineering KEY RESPONSIBILITIES: Perform RTL design of digital components in Verilog/system

STA EngineerJob Title - STA Engineer

Xoriant CorporationCompany Name - Xoriant Corporation

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San Jose, California, USA

Contract

Title: Physical Design STA Engineer Location: San Jose, CA 95134 Duration: 6 Months+ Job Description: Sr. STA Engineer with 15+ years experience for STA position (Physical Design Static Timing Analysis / STA Engineer).Perform static timing analysis (STA) and timing optimization, generate and verifies timing constraints, performs SI/Noise analysis, and fixes timing & noise violations at full chip/block level for SoCs.Strong understanding of digital design concepts, including synthesis, timing

Verification EngineerJob Title - Verification Engineer

Happiest Minds Technologies LimitedCompany Name - Happiest Minds Technologies Limited

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Fremont, California, USA

Third Party, Contract

Verification Engineer Fremont, CA BSEE or BSCS, or equivalent 5+ years of ASIC/FPGA verification experience using SystemVerilog / UVMMust have experience with:Verification flow using Questa simulationDeveloping verification plansDesigning and implementing SystemVerilog / UVM test benches for constrained-random verificationDeveloping functional coverage modelsWriting and debugging directed and random test casesExperience with automation/scripting (Python, Perl, sed, awk, tcl/tk, sh)Experience wit

RTL/ASIC Design EngineerJob Title - RTL/ASIC Design Engineer

NetwovenCompany Name - Netwoven

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San Jose, California, USA

Contract

KEY RESPONSIBILITIES: Microarchitecture development of IP subsystems Perform RTL design of digital components. Work with functional verification team to meet coverage and quality standards. Analyze/fix Lint and CDC errors of the components. Guarantee quality/timely deliverables meeting project s schedule. Help to improve/automate design process. Support post-silicon product bring-up/debug. PREFERRED EXPERIENCE: 10 years' experience in RTL coding Knowledge of PCIe Gen5 and PIPE specification Kno

Failure Analysis EngineerJob Title - Failure Analysis Engineer

Rootshell Enterprise Technologies Inc.Company Name - Rootshell Enterprise Technologies Inc.

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Santa Clara, California, USA

Full-time, Contract

Hello All, Greetings from Rootshell Inc. Rootshell Enterprise Technologies Inc. is a recognized provider of professional IT Consulting services in the US. We are actively seeking Failure Analysis Engineer for one of our client, Please share your resume with current location & full contact info Role: Failure Analysis Engineer Location:Santa Clara, California- Onsite Job description Expert technical skills in the manufacturing test environment, both PCBA and box build/system level assemblies.

Physical Design engineerJob Title - Physical Design engineer

Innova Solutions, IncCompany Name - Innova Solutions, Inc

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Sunnyvale, California, USA

Full-time

Innova Solutions is immediately hiring aPhysical Design engineer Position type: Full Time Duration: Full Time Location: Sunnyvale, CA (Onsite) As a Physical Design engineer , you will: Minimum Qualifications: Experience in power delivery, power grid design and signoffExperience with power delivery networks, including on-die power gating and in-rush current profilesUnderstanding of RTL2GDS flow and design tape outs in 16nm/14nm or below process technologiesExperience with low power implementat

Sr. Failure Analysis EngineerJob Title - Sr. Failure Analysis Engineer

Xoriant CorporationCompany Name - Xoriant Corporation

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Santa Clara, California, USA

Contract

Job Title: Sr. Failure Analysis Engineer Location: Santa Clara, CA Duration: 12+ Months Xoriant reasonably expects the pay rate for this position to be within the following range: $38.00/hour-$42.00/hour. Duties: This position is for a Sr. Failure Analysis Engineer. (On-Site 5 days/week) Primary Tasks: Drive returned product Failure Analysis, characterizing failures, and escalating issues and trends to the Hardware Quality Engineering team Resolve escalated RMA's by determining the hardware ro

Principal Digital Design Engineer, SoCJob Title - Principal Digital Design Engineer, SoC

Island StaffingCompany Name - Island Staffing

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San Jose, California, USA

Full-time

As a Principal Engineer/Manager, Digital Design SoC, you will be leading with a small team of design engineers to develop novel SoC products for connectivity and communications. You will also be a key contributor to product definition and resulting detailed device performance and functional requirements specifications. You will support other discipline teams to bring the SoC device to successful mass production. This full-time position is based in San Jose, CA. Key Responsibilities Review and co

Lab/System AdministratorJob Title - Lab/System Administrator

EITAcies, Inc.Company Name - EITAcies, Inc.

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Santa Clara, California, USA

Full-time, Part-time, Contract, Third Party

About US : Since 2008, EITACIES has been a beacon of innovation, crafting tailored tech solutions. From humble beginnings, we've grown globally, nurturing client relationships and adapting to digital shifts. Today, we're a tech powerhouse, delivering customized excellence from startups to Fortune 500, State & Federal clients. Responsibilities: Typical job responsibilities will include: Implementation and management of Lab Automation utilizing Spirent Velocity platform. Architecture and Design o

VMware AdministratorJob Title - VMware Administrator

Xoriant CorporationCompany Name - Xoriant Corporation

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Santa Clara, California, USA

Contract

Job Title: Lab Administrator (VMware) Location: Santa Clara, CA Duration: 6+ Months Duties: ** In Santa Clara Office- On-site 100%. Xoriant reasonably expects the pay rate for this position to be within the following range: $35.00/hour-$40.00/hour. Responsibilities: Typical job responsibilities will include: Implementation and management of Lab Automation utilizing Spirent Velocity platform.Architecture and Design of a secure Network environment for the lab.Automation script development using Py

Physical Design Engineer - PTPXJob Title - Physical Design Engineer - PTPX

SGS ConsultingCompany Name - SGS Consulting

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Remote

Contract

Job Description: 10+ Years of experience in backend implementation such as synthesis, timing closure, power analysis etc.Experience with power analysis and tools like PTPX (must have).Experience with RTL Synthesis and design optimization for Power, Performance, Area.Experience with EDA tools and scripting languages (Python, TCL) used to build tools and flows for complex environments.Experience with communicating across functional internal teams and vendors.Bachelor s degree in computer science,

ASIC Physical Designers - IIIJob Title - ASIC Physical Designers - III

MindlanceCompany Name - Mindlance

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Remote

Contract

100% Remote Job Responsibilities: Collaborate with the design team to understand and define physical design specifications for mixed signal circuits. Perform floor planning, power planning, and placement of digital and analog blocks. Physical design validation involving static timing and noise analysis. Power grid characterization and analysis using industry standard tools. Troubleshoot and resolve physical design issues and implement design changes. Work with DRC/LVS teams to ensure desig

Rhapsody / Bridges Interface DeveloperJob Title - Rhapsody / Bridges Interface Developer

Randstad DigitalCompany Name - Randstad Digital

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Remote or Minneapolis, Minnesota, USA

Contract

job summary: This role requires 10% travel. SKILLS: Rhapsody Bridges Healthcare integration experience developing interfaces using Corepoint. Epic Bridges Certified Healthcare IT analyst experience in Epic and/or additional Epic certifications is a plus. Knowledge of other integration engines, especially Rhapsody, is a plus. Experience developing with HL7 2.X interfaces (ADT, SIU, ORM, ORU, MDM, DFT) , certification preferred Knowledge of DIRECT secure messaging preferred HL7 messaging standard

Senior ASIC / FPGA Design Verification EngineerJob Title - Senior ASIC / FPGA Design Verification Engineer

Technical LinkCompany Name - Technical Link

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Remote

Contract

6 Months Fully remote Verification RESPONSIBILITIES The senior verifier will be called upon to: develop SystemVerilog (or VHDL) test benches for the verification of ASICs or FPGAs;apply the various techniques and approaches of the Universal Verification Methodology (UVM);contribute to the development of the test infrastructure;document and report problems found to designers and assist them in identifying the source of the problems;support laboratory testing.QUALIFICATIONS Experience in writing

Physical Design EngineerJob Title - Physical Design Engineer

Xoriant CorporationCompany Name - Xoriant Corporation

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San Jose, California, USA

Contract

Job Title: Physical Design Engineer Location: San Jose, CA (hybrid) Duration: 6+ months (Possible Extension-Long Term Project) Rate: $100/hr on w2 Description Perform physical implementation in Synopsys tools (ICC2)Develop and maintain the tool flow to support the project.Work with Team to enhance PD methodology.Fixing DRC/LVS issuesFixing voltage drop violationsTiming ECOsRequirements Experience in advanced node processes 16nm and below.Experience with industry-standard tools, preference for Sy