verification engineer Jobs

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Principal Verification Engineer

OSI Engineering, Inc.

San Jose, California, USA

Full-time

A leading chip and silicon IP provider is looking to hire a talented Principal Verification Engineer to join its Memory Interconnect Design team in either San Jose, CA or Morrisville, NC. This is a great opportunity to work alongside some of the industry's top engineers to help develop cutting-edge technologies that accelerate and secure data. In this full-time role, the Principal Verification Engineer will report to the Director of Design Engineering and take a key role in product development

Software Verification Engineer

SAIC

Middletown, Rhode Island, USA

Full-time

Job ID: 2505872 Location: MIDDLETOWN, RI, US Date Posted: 2025-06-04 Category: Information Technology Subcategory: Embedded SW Engr Schedule: Full-time Shift: Day Job Travel: No Minimum Clearance Required: None Clearance Level Must Be Able to Obtain: Secret Potential for Remote Work: No Description SAIC is seeking Software Verification Engineers to support the US Navy in Middletown, RI. JOB DESCRIPTION: Performs software verification activities for a large test system containing deskt

Principal Design Verification Engineer

OSI Engineering, Inc.

San Jose, California, USA

Full-time

Principal Design Verification Engineer A leading chip and silicon IP provider focused on accelerating and securing data is looking to hire an outstanding Principal Design Verification Engineer to join its Memory Interface Chip (MIC) team in San Jose, CA. This role offers the chance to work alongside top engineering talent on innovative products that push the boundaries of speed and data security. As a Principal Design Verification Engineer, you ll play a critical role in the development of MIC

CPU Verification ENgineer

TalentBridge

Menlo Park, California, USA

Contract

CPU/SOCS VERIFICATION ENGINEER Location: Menlo Park, CA 94025 ( 5 Days onsite ) Duration: 12 months + extension Job Summary: As a CPU Verification Engineer, you will be a key member of the design verification team at to deliver our high-quality next generation AI integrated, cloud-native server class SoCs. You will be responsible for defining verification strategies and architecting solutions for complex verification problems. You will partner with stakeholders in adjacent domains and enable

Defense Sr. FPGA Design Verification Engineer with Secret Clearance

ZoeTech Staffing LLC

Columbia, Maryland, USA

Full-time

Job Description: Our defense client is seeking digital verification engineers to support our development of secure tactical communication products. The candidate will function primarily in an FPGA verification role, working in a cooperative team environment to verify and test embedded FPGA firmware for radio communication systems. Successful candidates must have familiarity with a coverage-driven verification methodology from planning through closure as well as knowledge of industry standard int

Silicon Verification Engineer 2

Dexian DISYS

Remote

Contract

Role: Silicon Verification Engineer 2 Location: 100% remote Duration: Till 9/30/2025 (Possible Extension : Yes) Summary: The main function of Silicon Verification Engineer is to be a part of the test-plan generation process, creating, testing, and implementing various verification plans. Job Responsibilities: Define, document, and implement a UVM verification environment including agents and scoreboards Write test plans and implement them by developing tests, test generators, test benches, che

Software (SW) verification/validation engineer with medical devices Experience

KONNECTINGTREE INC

Waltham, Massachusetts, USA

Contract

The role required SW verification engineer. You may refer the JD shared earlier & specifically engineers working as SW verification engineer would be suitable for this position.Bachelor s degree along with (3- 8) years of software test engineer or related experience with at least 2 years in medical device or health careDesign, develop and execute test cases to ensure the quality of the product by proving system functionality, verify business and user requirements are met in Electrophysiology dom

Verification Engineer

AdientOne LLC

Massachusetts, USA

Contract

Role: Verification Engineer Location: Boxborough MA 01719 | Hybrid Duration: 12+ months Note: Prefer experience with PSS language and UVM Job Description: Participate in the functional verification of a block(s) of complex ASICs and/or IP cores for a combined CPU/GPU development effort. Be part of a team of design and verification engineers, working closely with other team members to understand and verify the functionality of a given design element within the context of the block, chip and ove

Digital SoC Design Verification Principal Engineer/Manager

Island Staffing

San Jose, California, USA

Full-time

Digital SoC Design Verification Principal Engineer/Manager 140-225K (+ Pre-IPO Stock Options) San Jose, CA (hybrid 1 day/week remote, 4 days/week onsite) We are looking for an experienced Digital SoC Design Verification Principal Engineer/Manager to lead a team of engineers in developing innovative Open RAN SoC functional blocks for 5G cellular base stations. In this role, you will be responsible for driving the development of high-quality digital solutions and contributing to product definition

Design Verification Engineer

LeadStack, Inc.

No location provided

Full-time, Contract

Lead Stack Inc. is an award-winning, one of the nation's fastest-growing, certified minority-owned (MBE) staffing services provider of contingent workforce. As a recognized industry leader in contingent workforce solutions and Certified as a Great Place to Work, we're proud to partner with some of the most admired Fortune 500 brands in the world. TITLE: Design Verification Engineer LOCATION: San Jose CA/ Austin TX DURATION: 5+ Months with possible extension Rate: $90-$110/hr on W2 Job Descriptio

Design Verification Engineer

AdientOne LLC

Massachusetts, USA

Contract

Role: Design Verification Engineer Location: Boxborough MA 01719 | Hybrid Duration: 7 months Job Description: Collaborate with team to verify complex IP blocks. Develop and execute tests. Debug issues related to functionality, performance, and power. Work on functional and/or code coverage closure. Requirements: Proven experience working in UVM and constrained-random simulation environments. Strong knowledge of System Verilog, Verilog, C/C++, and scripting languages. Familiarity with 3D pipelin

Mixed Signal Verification Engineer

Everest Consultants, Inc

Hillsboro, Oregon, USA

Full-time

Job Title: Mixed Signal Verification Engineer Duration: Permanent, Full-time Location: Hillsboro, OR (Hybrid: onsite 3 days per week) Pay Range: $101,000 to $170,000 per year **Candidates must have valid U.S. work authorization at the time of hire. Our client, a leader in the test-and-measurement and wireless communications industries, is seeking passionate individuals with a vision for the future, a desire to make an impact, and a drive to turn innovative ideas into reality. They are building d

Design Verification Engineer (GPU)

West Coast Consulting LLC

Texas, USA

Contract

Job Description Austin, TX or San Jose, CA Onsite Description: Position Requirements: Role and Responsibilities: Key responsibilities include Work with architects and designers to build verification environments and test plans Craft functional verification coverage strategy to ensure complete test suite implementation Develop assertions and checks to optimize isolation time and produce meaningful failing signatures Analyze failing tests to root cause along, working with RTL and reference modeli

Sr. Systems Analyst & Verification Engineer - Onsite in Costa Mesa, CA

Dataflix Inc.

Costa Mesa, California, USA

Contract, Third Party

Overview: The Sr. Systems Analyst & Verification Engineer position projects focused on the delivery of Telematics and Connectivity Services solutions. You will interact with all levels and teams in the organization. As a Sr. Systems Analysis and Verification Engineer, you are responsible for development of the verification strategy (outline test methods, test facilities and align to product requirements) as well as reporting out on test readiness, test results and product technical risks of new

Firmware Verification/Test Engineer (Blackbox)

Oxford Global Resources

Burnsville, Minnesota, USA

Contract

Title: Firmware Verification / Test Engineer (Blackbox) Location: Burnsville, MN OR Lincoln, NE 100% ONSITE.Preference is on local, will look at Nationals if a perfect fit Length of Contract: 8 Months Ideal Start: as early as 5/12 if we can get someone there Scope: They will need figure out what test cases need to be written, write the test case and then will be running / executing the test case and then integrating them into Azure Devops. This beltpack device contains a microphone and 3.5 au

Mixed-Signal Design Verification Engineer

Talent Junction, LLC.

San Jose, California, USA

Contract, Third Party

Title: Mixed-Signal Design Verification Engineer Location: San Jose, CA Key Technical Skills:UVM/System Verilog, Python, Synopsys/Cadence EDA Verifications Tools, AMS Verification Required Experience/Skills: Good knowledge of System-Verilog RTL coding including state machines, adders, multipliers, combinatorial logic, etc. Good understanding of digital design for mixed signal control loops and designing Verilog / Verilog- A code to control analog circuits (e.g. bandgap, PLL, Amplifier, Filters

Satellite or Space FPGA Design / Verification Engineer

Sun Technologies,Inc.

Remote

Contract

Job Title: Satellite or Space FPGA Design / Verification Engineer Duration: up to 3 months contract with possible extension Location: Remote Work / Work from Home Work Schedule: 5/40-1st Shift Pay Rate: $87.19/hr on W2 [the pay rate may differ depending on your skills, education, experience, and other qualifications] Featured Benefits: Medical Insurance in compliance with the ACA401(k)Sick leave in compliance with applicable state, federal, and local laws Job Description: ASIC/FPGA Engineer an

System IP Design Verification Engineer

West Coast Consulting LLC

California, USA

Contract

Job Description ONSITE - San Jose, CA or Austin, TX Summary We are currently looking for exceptional hardware verification engineers to join our System IP team in our Austin, TX R & D Center (SARC) and our Advanced Computing Lab (ACL) in San Jose, CA. System IP team develops proprietary coherent interconnect and memory controller IPs deployed in many high-volume products. Job Description As a Senior Staff System IP Design Verification Contractor you will contribute to the functional verificat

Design Verification Engineer- Remote- USA

Yochana IT Solutions

US

Contract, Third Party

Good DV Skill with major GLS work experience. Expertise in testbench updates for GLS Expertise in Scripting languages perl or python Experience with Make, Yaml & Json file systems. Experience with 0 delay simulations and post layout simulations with SDF back annotations (Best/Typical/Worst Case analysis). Good understanding of RTL synthesis , Static Timing Analysis & LEC Flows. Experience with flow optimizations such as Grey/Black-boxing techniques Good at communicating requirements/issues wit

System Verilog UVM Design Verification Test Engineer

U.S. Tech Solutions Inc.

Remote

Contract

Job Description: The project relates to the design and verification of a custom controller for analog components. The controller has interfaces such as SPI, Ethernet and AXI to drive the internal components and send data. Responsibilities: UVM/python test development for driving VIPs and other stimulus driversGeneration of test components such as monitors, scoreboards and python modelsCoverage closure and GLS bringup and testing Experience: 6+ years of experience with verification methodologies