verification engineer Jobs

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Verification Engineer

Sunrise Systems, Inc.

Santa Clara, California, USA

Contract

Job Title: Verification Engineer - Specialized (US) Job ID: 25-08588 Location: Santa Clara, CA 95054 (Hybrid 3 days per week) Duration: 6 Months on W2 contract Job Duties: Participate in the functional verification of a block(s) of complex ASICs and/or IP cores for an I/O SOC. Be part of a team of design verification team , working closely with other team members to understand and verify the functionality of a given design element within the context of the block, chip and overall system. Candida

Software (SW) verification/validation engineer with medical devices Experience

KONNECTINGTREE INC

Waltham, Massachusetts, USA

Contract

The role required SW verification engineer. You may refer the JD shared earlier & specifically engineers working as SW verification engineer would be suitable for this position.Bachelor s degree along with (3- 8) years of software test engineer or related experience with at least 2 years in medical device or health careDesign, develop and execute test cases to ensure the quality of the product by proving system functionality, verify business and user requirements are met in Electrophysiology dom

CPU Verification ENgineer

TalentBridge

Menlo Park, California, USA

Contract

CPU/SOCS VERIFICATION ENGINEER Location: Menlo Park, CA 94025 ( 5 Days onsite ) Duration: 12 months + extension Job Summary: As a CPU Verification Engineer, you will be a key member of the design verification team at to deliver our high-quality next generation AI integrated, cloud-native server class SoCs. You will be responsible for defining verification strategies and architecting solutions for complex verification problems. You will partner with stakeholders in adjacent domains and enable

Design Verification Engineer

LeadStack, Inc.

No location provided

Full-time, Contract

Lead Stack Inc. is an award-winning, one of the nation's fastest-growing, certified minority-owned (MBE) staffing services provider of contingent workforce. As a recognized industry leader in contingent workforce solutions and Certified as a Great Place to Work, we're proud to partner with some of the most admired Fortune 500 brands in the world. TITLE: Design Verification Engineer LOCATION: San Jose CA/ Austin TX DURATION: 5+ Months with possible extension Rate: $90-$110/hr on W2 Job Descriptio

ASIC Verification Engineer

AMD (Advanced Micro Devices)

Santa Clara, California, USA

Full-time

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellenc

Quantum Verification Engineer

Infinite Computer Solutions (ICS)

Rochester, Minnesota, USA

Contract

Job Title: Quantum Verification Engineer Duration: 12+ Months (Possibility of Extension) Location: Rochester, MN (Onsite) Role & Responsibilities Verification Ownership: Take charge of the verification triage for microprocessor components, contributing to the identification of functional and performance issues pre-silicon production. Implement best practices and innovative methodologies to ensure robust and efficient verification processes.Documentation and Communication: Thoroughly document ver

Senior Design Verification Engineer

Sivaltech

San Diego, California, USA

Contract

Job descriptionCompany Description Sivaltech is a well-established ASIC/FPGA, Analog, and Embedded Software design services company with offices in California, USA, and Bangalore, India. We are a preferred design services partner for both Fortune 500 companies and startups in the semiconductor industry. With expertise spanning GPUs, CPUs, wireless, communications, medical, broadband, and consumer electronics, Sivaltech is well-equipped to address our clients' complex design challenges. Role Desc

Low Power Verification Engineer

Sivaltech

San Jose, California, USA

Contract, Third Party

Job Title: Power Estimation Low Power Verification Engineer Location: San Jose, CA Job Description: Were seeking an experienced 10+ Yrs Power Estimation Low Power Verification Engineer to work with our team in San Jose, CA. As a key member of our team, youll be responsible for:- Collaborating with architects and logic designers to define power specifications and UPF- Supporting UPF for design, DV, and implementation teams- Verifying and signing off low power intent using VCLP tool- Defining low

Verification Engineer (Contractor)

Vigna Solutions Inc.

Remote

Contract

Role & Responsibilities Verification Ownership: Take charge of the verification triage for microprocessor components, contributing to the identification of functional and performance issues pre-silicon production. Implement best practices and innovative methodologies to ensure robust and efficient verification processes.Documentation and Communication: Thoroughly document verification issues, providing comprehensive insights for future reference and continuous improvement. Communicate progress e

Verification Engineer

AdientOne LLC

Massachusetts, USA

Contract

Role: Verification Engineer Location: Boxborough MA 01719 | Hybrid Duration: 12+ months Note: Prefer experience with PSS language and UVM Job Description: Participate in the functional verification of a block(s) of complex ASICs and/or IP cores for a combined CPU/GPU development effort. Be part of a team of design and verification engineers, working closely with other team members to understand and verify the functionality of a given design element within the context of the block, chip and ove

Silicon Verification Engineer 2

Dexian DISYS

Remote

Contract

Role: Silicon Verification Engineer 2 Location: 100% remote Duration: Till 9/30/2025 (Possible Extension : Yes) Summary: The main function of Silicon Verification Engineer is to be a part of the test-plan generation process, creating, testing, and implementing various verification plans. Job Responsibilities: Define, document, and implement a UVM verification environment including agents and scoreboards Write test plans and implement them by developing tests, test generators, test benches, che

Software Verification Engineer

Katalyst Healthcares and Lifesciences

Newton, Massachusetts, USA

Full-time

Job Description: We are seeking a meticulous and detail-oriented Medical Device Software Verification Tester to join our team. The successful candidate will be responsible for verifying software used in our medical devices and ensuring compliance with regulatory standards and internal quality requirements. This role involves designing, implementing, and executing test plans and procedures to identify and document software defects. Responsibilities: Test Planning and Design. Develop comprehensi

Quantum Verification Engineer

IBM

Poughkeepsie, New York, USA

Full-time

Introduction Do you want to grow your career and challenge yourself? Are you interested in designing high-impact solutions to solve complex problems? Do you want to be part of an agile, cross-disciplinary team that collaborates to develop end-to-end solutions? As a member of our IBM Chip Development team, you will have the opportunity to work with world-class talent to develop our next-generation silicon powering our IBM Z and POWER Systems. Our team works in a fast-paced, highly visible, matrix

SoC Power Verification Engineer

AMD (Advanced Micro Devices)

Boxborough, Massachusetts, USA

Full-time

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellenc

Senior DDR Subsystem Verification Engineer

Microsoft Corporation

Raleigh, North Carolina, USA

Full-time

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft ' s expanding Cloud Infrastructure and responsible for powering Microsoft ' s " Intelligent Cloud " mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance,

Design Verification Engineer

Avance Consulting

Austin, Texas, USA

Full-time

Job Description <>Key Responsibilities: Strong understanding of SV and UVM and good debugging skills. Understanding of AMBA protocols. Understand design specs and develop test plans based on functional and architectural requirements Build UVM/System Verilog-based verification environments for IP/subsystem/SoC level testing Develop directed and random testcases, perform coverage analysis, and close functional/code coverage Debug simulation failures and work closely with RTL designers to resolve

Software Verification Engineer

SAIC

Middletown, Rhode Island, USA

Full-time

Job ID: 2505872 Location: MIDDLETOWN, RI, US Date Posted: 2025-06-04 Category: Information Technology Subcategory: Embedded SW Engr Schedule: Full-time Shift: Day Job Travel: No Minimum Clearance Required: None Clearance Level Must Be Able to Obtain: Secret Potential for Remote Work: No Description SAIC is seeking Software Verification Engineers to support the US Navy in Middletown, RI. JOB DESCRIPTION: Performs software verification activities for a large test system containing deskt

IC Verification Engineer

Broadcom Corporation

San Jose, California, USA

Full-time

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Job duties include: Architect and develop scalable and reusable Testbench environment using the framework of Verification Methodologies. Drive Test plans for all features for Block/Core/SOC and Write Functional coverage for these features. Build pseudo

UVM Digital Verification Engineer

Draper

Remote or Cambridge, Massachusetts, USA

Full-time

Overview: Draper is an independent, nonprofit research and development company headquartered in Cambridge, MA. The 2,000+ employees of Draper tackle important national challenges with a promise of delivering successful and usable solutions. From military defense and space exploration to biomedical engineering, lives often depend on the solutions we provide. Our multidisciplinary teams of engineers and scientists work in a collaborative environment that inspires the cross-fertilization of ideas

Design Verification Engineer

AdientOne LLC

Massachusetts, USA

Contract

Role: Design Verification Engineer Location: Boxborough MA 01719 | Hybrid Duration: 7 months Job Description: Collaborate with team to verify complex IP blocks. Develop and execute tests. Debug issues related to functionality, performance, and power. Work on functional and/or code coverage closure. Requirements: Proven experience working in UVM and constrained-random simulation environments. Strong knowledge of System Verilog, Verilog, C/C++, and scripting languages. Familiarity with 3D pipelin