Senior Design Verification Engineer

Senior Design Verification Engineer

Location: Bay Area, CA (Complete Onsite)

Experience: 5+ years (Relevant)

Key Skill: SV/UVM, AXI expertise, NOC/Crossbar, Performance

What You'll Be Doing:

• Strong in SV/UVM scale test bench

• AXI expertise, NOC/Crossbar, Performance

• Regression/Triage and coverage closure

• Need asap → Program has already started and is in execution

• ARM CPU_SS (Cortex, Neon), Ability to work with Firmware team, Emulation is plus

• Coresight Debug Arch, DMA, NIC (AXI), C/SV mixed testing

• Block-level DV Testbench

• Cocotb – Python based System Verilog Framework ( is plus.

What we are looking for:

• A bachelor’s degree in electrical or computer engineering, accompanied by a minimum of 8 years of experience in ASIC or a related field, or a Master's Degree in Electrical or Computer Engineering with at least 5 years of experience in ASIC or a related discipline.

• Verification closure with team

• Make/Perl/Python

• Ensure customer satisfaction.

• Reporting to customer on daily or weekly progress effectively