ASIC Design Engineer Jobs in California

1 - 20 of 27 Jobs

FPGA/ASIC Design Engineer (Silicon Engineering)Job Title - FPGA/ASIC Design Engineer (Silicon Engineering)

SpaceXCompany Name - SpaceX

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Irvine, California, USA

Full-time

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. FPGA/ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the worl

Senior ASIC Design EngineerJob Title - Senior ASIC Design Engineer

CloudiousCompany Name - Cloudious

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San Jose, California, USA

Contract

Job Description: Map multi-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds, and testbenches to simulate FPGA components. Establish prototyping systems in the lab and contribute to defining, evolving, and supporting our prototyping methodology. Option to engage in block-level RTL design or block or top-level IP integration. Collaborate with Software, Design, and Verification teams to validate the functional and performance objectives of the SoC. What

Senior ASIC Design Engineer- Emulation (HAPS Engineer)Job Title - Senior ASIC Design Engineer- Emulation (HAPS Engineer)

CloudiousCompany Name - Cloudious

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San Jose, California, USA

Contract

Position: Senior ASIC Design Engineer- Emulation (HAPS Engineer) Location: San Jose, CA (Complete onsite) Experience: 8+ years (Relevant) What candidate will Be Doing: Map multi-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds, and testbenches to simulate FPGA components. Establish prototyping systems in the lab and contribute to defining, evolving, and supporting our prototyping methodology. Option to engage in block-level RTL design or block or top

Front-End ASIC Design EngineerJob Title - Front-End ASIC Design Engineer

DBSI ServicesCompany Name - DBSI Services

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Milpitas, California, USA

Full-time

Benefits: 401(k) 401(k) matching Relocation bonus Job Title: Front-End ASIC Design Engineer Job Description: Milpitas, CA Description: Responsibilities Include but are not Limited to: Ensure designs meet product Performance-Power-Area-Schedule requirements. Tasks may include Architecture / micro-Architecture; Logic Design; RTL integration and coding; Lint/CDC/DFT checks; Synthesis & supporting timing-closure; Contribute to and support Verification; Supporting Firmware and FPGA teams; Silicon

Sr. ASIC Design Verification Engineer, Project KuiperJob Title - Sr. ASIC Design Verification Engineer, Project Kuiper

Amazon Kuiper Manufacturing Enterprises LLCCompany Name - Amazon Kuiper Manufacturing Enterprises LLC

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San Diego, California, USA

Full-time

Project Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. The Role: Be part of Project Kuiper's sub-team responsible for defining and implementing the digital chip SOCs for communications via Low Earth Orbit satellites and Amazon gateways. This is a unique opportunity to define a groundbreaking wireless solution with few legacy constraints. The

ASIC/RTL Design Engineer - Senior at San Jose, CAJob Title - ASIC/RTL Design Engineer - Senior at San Jose, CA

Infobahn Softworld Inc.Company Name - Infobahn Softworld Inc.

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Santa Clara, California, USA

Contract, Third Party

TOP 3 SKILLS: Good understanding of SystemVerilog, analyzing existing designs and making modifications, able to understand tools used by ASIC engineers like Lint, CDC, STA, etc. - scripting is nice to have KEY RESPONSIBILITIES: Write micro-architecture documentation and own major portions of the design and implementation of blocks to meet functional, timing, area, and power requirements. Collaborate with architecture and hardware teams to understand the requirements. Work with verification and p

ASIC Engineer, Design VerificationJob Title - ASIC Engineer, Design Verification

Meta Platforms, Inc. (f/k/a Facebook, Inc.)Company Name - Meta Platforms, Inc. (f/k/a Facebook, Inc.)

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Sunnyvale, California, USA

Full-time

Meta Platforms, Inc. (f/k/a Facebook, Inc.) has the following positions in Sunnyvale, CA ASIC Engineer, Design Verification: Define and implement block/IP/SoC verification plans, build verification test benches to enable block/IP/sub-system/SoC level verification. (ref. code REQ-2503-148189: $178,763/year to $192,170/year). Individual pay is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base salary only, and do not include

Lead ASIC & FPGA Design Engineer - Vitis HLS (HYBRID TELEWORK)Job Title - Lead ASIC & FPGA Design Engineer - Vitis HLS (HYBRID TELEWORK)

Lockheed Martin CorporationCompany Name - Lockheed Martin Corporation

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Remote or King of Prussia, Pennsylvania, USA

Full-time

Job Description We are committed to work-life balance by promoting this hybrid telework opportunity. These job requirements allow the employee to work at a Lockheed Martin-designated office or job site for part of their schedule and has a predefined regular, recurring telework schedule for the remaining part of their work schedule. Who We Are Lockheed Martin is dedicated to shaping, developing, & advancing technologies & capabilities with a focus on our customers' needs as part of our 21st Ce

ASIC Engineer, Design VerificationJob Title - ASIC Engineer, Design Verification

Meta Platforms, Inc. (f/k/a Facebook, Inc.)Company Name - Meta Platforms, Inc. (f/k/a Facebook, Inc.)

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Remote

Full-time

Meta Platforms, Inc. (f/k/a Facebook, Inc.) has the following positions in Menlo Park, CA ASIC Engineer, Design Verification: Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification and develop functional tests based on verification test plan. Telecommute from anywhere in the U.S. permitted. (ref. code REQ-2506-152460: $238,228/year - $287,650/year). Individual pay is determined by skills, qualifications, experience, and loca

ASIC & FPGA Design Engineer Sr / Syracuse, NYJob Title - ASIC & FPGA Design Engineer Sr / Syracuse, NY

Lockheed Martin CorporationCompany Name - Lockheed Martin Corporation

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Remote or Liverpool, New York, USA

Full-time

Job Description What We're Doing At Lockheed Martin, we are passionate about innovation and integrity. We believe that by applying the highest standards of business ethics and forward-thinking, everything is within our capacity - and yours as a Lockheed Martin employee. Lockheed Martin values your skills, training, education, and background! The Work As an FPGA Engineer you will; Perform complex FPGA firmware architecture and/or custom digital board designs. Design digital signal processing, m

Physical Design Engineer Custom ASIC / SoCJob Title - Physical Design Engineer Custom ASIC / SoC

DivTek Global Solutions Inc.Company Name - DivTek Global Solutions Inc.

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San Jose, California, USA

Full-time

Job Title: Physical Design Engineer Custom ASIC / SoC Hybrid San Jose, CA Job Location: San Jose, CA (Hybrid) Benefits: Excellent PTO, full benefits, 401(k), hybrid schedule, great team culture Job Type: Full-Time, Permanent About Company: This is a full-time role, directly employed position through the client. Work Schedule Type: This is a hybrid position Relocation: Relocation assistance available Position Overview Physical Design Engineer: We are seeking a hands-on Physical Design Engineer w

Sr. Package Design Engineer ASIC/SOCJob Title - Sr. Package Design Engineer ASIC/SOC

DivTek Global Solutions Inc.Company Name - DivTek Global Solutions Inc.

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San Jose, California, USA

Full-time

Job Title Sr. Package Design Engineer ASIC/SOC Job Location: San Jose, CA (Hybrid) Benefits: Excellent PTO, full benefits, 401(k), hybrid schedule, great team culture Job Type: Full-Time, Permanent About Company: This is a full-time role, directly employed position through the client. Work Schedule Type: This is a hybrid position Relocation: Relocation assistance available The Role: Sr. Package Design Engineer We are seeking a highly experienced Package Design Engineer with 7+ years of hands-on

Staff ASIC & FPGA Design Engineer (HYBRID TELEWORK)Job Title - Staff ASIC & FPGA Design Engineer (HYBRID TELEWORK)

Lockheed Martin CorporationCompany Name - Lockheed Martin Corporation

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Remote or King of Prussia, Pennsylvania, USA

Full-time

Senior Staff Engineer, ASIC DesignJob Title - Senior Staff Engineer, ASIC Design

Samsung Electronics AmericaCompany Name - Samsung Electronics America

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San Jose, California, USA

Full-time

Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries o

ASIC FPGA Design and Verification Engineer - (Experienced, Lead, or Senior) - MTVJob Title - ASIC FPGA Design and Verification Engineer - (Experienced, Lead, or Senior) - MTV

Boeing CompanyCompany Name - Boeing Company

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Mountain View, California, USA

Full-time

ASIC FPGA Design and Verification Engineer - (Experienced, Lead, or Senior) - MTV Company: The Boeing Company Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC and/or FPGA Design and Verification Engineers (Experienced, Lead, or Senior) to join us as part of our Boeing Electronic Products team at the heart of Boeing's products; ASICs and FPGAs in Mountain View, CA. From complex digitally beamformed phased arrays for constellation satellite programs to c

Senior Reset and Boot ASIC EngineerJob Title - Senior Reset and Boot ASIC Engineer

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Remote or Santa Clara, California, USA

Full-time

NVIDIA is looking for a Senior Reset and Boot ASIC Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 fueled the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a "learning machine" that constantly evolves by adapting to new opportunities that are hard to pursue, that o

ASIC and/or FPGA Design & Verification Engineer (Lead, Senior or Principal)Job Title - ASIC and/or FPGA Design & Verification Engineer (Lead, Senior or Principal)

Boeing CompanyCompany Name - Boeing Company

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Huntington Beach, California, USA

Full-time

ASIC and/or FPGA Design & Verification Engineer (Lead, Senior or Principal) Company: The Boeing Company Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC and/or FPGA Design and Verification Engineers (Lead, Senior or Principal) to join us as part of our Boeing Electronic Products team at the heart of Boeing's products; ASICs and FPGAs in Huntington Beach or El Segundo, CA. From complex digitally beamformed phased arrays for constellation satellite prog

Principal Analog Mixed Signal ASIC EngineerJob Title - Principal Analog Mixed Signal ASIC Engineer

DraperCompany Name - Draper

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Remote or Cambridge, Massachusetts, USA

Full-time

Overview: Draper is an independent, nonprofit research and development company headquartered in Cambridge, MA. The 2,000+ employees of Draper tackle important national challenges with a promise of delivering successful and usable solutions. From military defense and space exploration to biomedical engineering, lives often depend on the solutions we provide. Our multidisciplinary teams of engineers and scientists work in a collaborative environment that inspires the cross-fertilization of ideas

ASIC Verification EngineerJob Title - ASIC Verification Engineer

Cisco Systems, Inc.Company Name - Cisco Systems, Inc.

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San Jose, California, USA

Full-time

The application window is expected to close on 7/30/25. This role will work onsite out of our San Jose, CA office. Who We Are: The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world. Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon arc

Direct Client : "Design Engineer " Position @ San Jose CAJob Title - Direct Client : "Design Engineer " Position @ San Jose CA

Infobahn Softworld Inc.Company Name - Infobahn Softworld Inc.

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Santa Clara, California, USA

Contract, Third Party

Job Title: ASIC/RTL Design Engineer Primary Skills : RTL coding, TCL coding, Python coding, understanding of different CAD tools (synthesis, lint, CDC, RDC, PrimeTime). Location: San Jose CA Duration : 12+ Months Job Description: Location: San Jose - Onsite Interviews: Interviews will be online. Two interviews. Top skills: RTL coding, TCL coding, Python coding, understanding of different CAD tools (synthesis, lint, CDC, RDC, PrimeTime). JOB DUTIES: The work will expose the designer to a nu