Mountain View, California
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4d ago
Hi , This role is a Full Time / Permanent . Title: Senior ASIC / SoC Network-on-Chip Design Engineer or Senior ASIC Design Engineer Location : Mountain View CA Qualifications 8+ years delivering ASIC/SoC IP designs. 6+ years of hands-on digital design, RTL, and microarchitecture experience. Strong experience with Verilog/SystemVerilog, synthesis, timing constraints, CDC, Lint, and PPA trade-offs. Experience with NoC/interconnect and high-throughput/low-latency designs. Experience with SoC
Easy Apply
Full-time
Depends on Experience



